PIC18LF4520ESLASHSPQTP datasheet(58/390 Pages) MICROCHIP

58 / 390 page

PIC18F2420/2520/4420/4520

DS39631A-page 56

Preliminary

 2004 Microchip Technology Inc.

5.1.2.4

Stack Full and Underflow Resets

Device Resets on stack overflow and stack underflow

conditions are enabled by setting the STVREN bit in

Configuration Register 4L. When STVREN is set, a full

or underflow will set the appropriate STKFUL or

STKUNF bit and then cause a device Reset. When

STVREN is cleared, a full or underflow condition will set

the appropriate STKFUL or STKUNF bit but not cause

a device Reset. The STKFUL or STKUNF bits are

cleared by the user software or a Power-on Reset.

5.1.3

FAST REGISTER STACK

A fast register stack is provided for the Status, WREG

and BSR registers, to provide a “fast return” option for

interrupts. The stack for each register is only one level

deep and is neither readable nor writable. It is loaded

with the current value of the corresponding register

when the processor vectors for an interrupt. All inter-

rupt sources will push values into the stack registers.

The values in the registers are then loaded back into

their associated registers if the RETFIE, FAST

instruction is used to return from the interrupt.

If both low and high priority interrupts are enabled, the

stack registers cannot be used reliably to return from

low priority interrupts. If a high priority interrupt occurs

while servicing a low priority interrupt, the stack register

values stored by the low priority interrupt will be

overwritten. In these cases, users must save the key

registers in software during a low priority interrupt.

If interrupt priority is not used, all interrupts may use the

fast register stack for returns from interrupt. If no inter-

rupts are used, the fast register stack can be used to

restore the Status, WREG and BSR registers at the end

of a subroutine call. To use the fast register stack for a

subroutine call, a CALL label, FAST instruction must

be executed to save the Status, WREG and BSR

registers to the fast register stack. A RETURN, FAST

instruction is then executed to restore these registers

from the fast register stack.

Example 5-1 shows a source code example that uses

the fast register stack during a subroutine call and

return.

EXAMPLE 5-1:

FAST REGISTER STACK

CODE EXAMPLE

5.1.4

LOOK-UP TABLES IN PROGRAM

MEMORY

There may be programming situations that require the

creation of data structures, or look-up tables, in

program memory. For PIC18 devices, look-up tables

can be implemented in two ways:

• Computed GOTO

• Table Reads

5.1.4.1

Computed GOTO

A computed GOTO is accomplished by adding an offset

to the program counter. An example is shown in

Example 5-2.

A look-up table can be formed with an ADDWF

PCL

instruction and a group of RETLW nn instructions. The

W register is loaded with an offset into the table before

executing a call to that table. The first instruction of the

called routine is the ADDWF PCL instruction. The next

instruction executed will be one of the RETLW

instructions that returns the value ‘nn’ to the calling

function.

The offset value (in WREG) specifies the number of

bytes that the program counter should advance and

should be multiples of 2 (LSb = 0).

In this method, only one data byte may be stored in

each instruction location and room on the return

address stack is required.

EXAMPLE 5-2:

COMPUTED GOTO USING

AN OFFSET VALUE

5.1.4.2

Table Reads and Table Writes

A better method of storing data in program memory

allows two bytes of data to be stored in each instruction

location.

Look-up table data may be stored two bytes per pro-

gram word by using table reads and writes. The Table

Pointer (TBLPTR) register specifies the byte address

and the Table Latch (TABLAT) register contains the

data that is read from or written to program memory.

Data is transferred to or from program memory one

byte at a time.

Table read and table write operations are discussed

further in Section 6.1 “Table Reads and Table

Writes”.

CALL SUB1, FAST

;STATUS, WREG, BSR

;SAVED IN FAST REGISTER

;STACK

•

SUB1

•

RETURN, FAST

;RESTORE VALUES SAVED

;IN FAST REGISTER STACK

MOVF

OFFSET, W

CALL

TABLE

ORG

nn00h

TABLE

ADDWF

PCL

RETLW

nnh

RETLW

nnh

RETLW

nnh

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