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PIC18LF4520E/SPQTP 数据表(PDF) 117 Page - Microchip Technology

部件名 PIC18LF4520E/SPQTP
功能描述  28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  390 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC18LF4520E/SPQTP 数据表(HTML) 117 Page - Microchip Technology

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 2004 Microchip Technology Inc.
Preliminary
DS39631A-page 115
PIC18F2420/2520/4420/4520
TABLE 10-7:
PORTD I/O SUMMARY
Pin
Function
TRIS
Setting
I/O
I/O
Type
Description
RD0/PSP0
RD0
0
O
DIG
LATD<0> data output.
1
I
ST
PORTD<0> data input.
PSP0
x
O
DIG
PSP read data output (LATD<0>); takes priority over port data.
x
I
TTL
PSP write data input.
RD1/PSP1
RD1
0
O
DIG
LATD<1> data output.
1
I
ST
PORTD<1> data input.
PSP1
x
O
DIG
PSP read data output (LATD<1>); takes priority over port data.
x
I
TTL
PSP write data input.
RD2/PSP2
RD2
0
O
DIG
LATD<2> data output.
1
I
ST
PORTD<2> data input.
PSP2
x
O
DIG
PSP read data output (LATD<2>); takes priority over port data.
x
I
TTL
PSP write data input.
RD3/PSP3
RD3
0
O
DIG
LATD<3> data output.
1
I
ST
PORTD<3> data input.
PSP3
x
O
DIG
PSP read data output (LATD<3>); takes priority over port data.
x
I
TTL
PSP write data input.
RD4/PSP4
RD4
0
O
DIG
LATD<4> data output.
1
I
ST
PORTD<4> data input.
PSP4
x
O
DIG
PSP read data output (LATD<4>); takes priority over port data.
x
I
TTL
PSP write data input.
RD5/PSP5/P1B
RD5
0
O
DIG
LATD<5> data output.
1
I
ST
PORTD<5> data input.
PSP5
x
O
DIG
PSP read data output (LATD<5>); takes priority over port data.
x
I
TTL
PSP write data input.
P1B
0
O
DIG
ECCP1 Enhanced PWM output, channel B; takes priority over port and
PSP data. May be configured for tri-state during Enhanced PWM
shutdown events.
RD6/PSP6/P1C
RD6
0
O
DIG
LATD<6> data output.
1
I
ST
PORTD<6> data input.
PSP6
x
O
DIG
PSP read data output (LATD<6>); takes priority over port data.
x
I
TTL
PSP write data input.
P1C
0
O
DIG
ECCP1 Enhanced PWM output, channel C; takes priority over port and
PSP data. May be configured for tri-state during Enhanced PWM
shutdown events.
RD7/PSP7/P1D
RD7
0
O
DIG
LATD<7> data output.
1
I
ST
PORTD<7> data input.
PSP7
x
O
DIG
PSP read data output (LATD<7>); takes priority over port data.
x
I
TTL
PSP write data input.
P1D
0
O
DIG
ECCP1 Enhanced PWM output, channel D; takes priority over port and
PSP data. May be configured for tri-state during Enhanced PWM
shutdown events.
Legend:
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; x = Don’t care
(TRIS bit does not affect port direction or is overridden for this option).



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