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FS501 数据表(PDF) 7 Page - Fortune Semiconductor Corp. |
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FS501 数据表(HTML) 7 Page - Fortune Semiconductor Corp. |
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7 / 31 page ![]() PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNITS Instrumentation Amplifier @ Gain = 30, Vref=0.5V, TA=25℃ Input Offset Voltage without AZ Rs<100 20 V Input Offset Voltage with AZ Rs<100 0 3 V Input Offset Drift without AZ -20℃<TA<+50℃ 200 nV/℃ Input Offset Drift with AZ -20℃<TA<+50℃ 20 nV/℃ Input Referred Noise Rs=100 0.3 0.6 Vpp Input Bias Current [2] 100 300 pA Current Consumption 180 220 A Regulator Analog Ground Source Capability ΔVO=-0.1V 15 20 μ A Analog Ground Sink Capability Δ VO=0.1V 3 5 mA VBAT 5.5 9 V Low Battery Detection Voltage 6.7 6.8 6.9 V VDD Operating Current VIN=0, 500mV Scale 960 μ A Sleep Current 10 30 μ A Parasitic Capacitance 10 15 pF Digital Output High IOUT=-1mA 5 V Digital Output Low IOUT=1mA 25 mV Digital Input High V Digital Input Low V Temperature Range Operating Temperature Range -40 25 85 C Storage Temperature Range -65 25 150 C These parameters are guaranteed by design and are tested only by sampling while mass production. While a voltage source with large output impedance is measured by an instrumentation amplifier having input bias current, an additional input offset voltage will be introduced. However, this offset voltage could be cancelled by mirrored offset cancellation technique. |
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