GPCE2P064B

© Generalplus Technology Inc.

Proprietary & Confidential

7

Apr. 07, 2015

Version: 1.2

5.1.3 SOP24 (HS102) pin descriptions

Mnemonic

PIN No.

(HS102)

Type

Description

PORT A, Port B

IOA[0]

IOA[1]

IOA[12]

IOA[14]

IOA[15]

IOA[13]

IOA[8]

IOA[7]

IOA[6]

IOA[3]

14

15

16

17

18

19

20

22

23

24

I/O

IOA : bi-directional I/O ports

It can be programmed as wakeup I/O pins

IOB[0]

IOB[1]

IOB[2]

IOB[3]

9

10

11

12

I/O

IOB : bi-directional I/O ports

Under OTP ROM programming mode, IOB2SCK, IOB3SDA.

Power & GND

VDD_IOA

21

P

Power VDD for Port A

VDD_IOB

13

P

Power VDD for Port B

V3_REGO

3

P

3V power output from regulator

VDD_REG

4

P

Positive supply for regulator(2.4V~5.5V)

VSS_REG

5

G

Ground reference for regulator

OPTION

TEST

8

I

TEST Mode selection pin, high is test mode and low is normal mode (Pad internal pull low)

VPP

2

I

High voltage during OTP programming.

NC at the normal run.

EPM

1

I

Program control input. Connect to VDDIN during OTP programming. NC at normal run

PLL

VCOIN

6

I

PLL low pass filter input

Other Signal

RESETB

7

I

System reset pin (active low)