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GD25B127DFES 数据表(PDF) 51 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25B127DFES 数据表(HTML) 51 Page - GigaDevice Semiconductor (Beijing) Inc. |
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51 / 65 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25B127D 51 (T= -40℃~105℃, VCC=2.7~3.6V, CL=30pf) Symbol Parameter Min. Typ. Max. Unit. FC Serial Clock Frequency For: Fast Read (0BH), on 2.7V-3.6V power supply 80 MHz fC1 Serial Clock Frequency For: Dual Output (3BH), Quad Output (6BH), Dual I/O (BBH), Quad I/O (EBH), Quad I/O Word Fast Read (E7H), on 2.7V-3.0V power supply 60 MHz fC2 Serial Clock Frequency For: Dual Output (3BH), Quad Output (6BH), Dual I/O (BBH), Quad I/O (EBH), Quad I/O Word Fast Read (E7H), on 3.0V-3.6V power supply 80 MHz fR Serial Clock Frequency For: Read (03H), Read Manufacturer ID/device ID (90H), Read Identification (9FH) 60 MHz tCLH Serial Clock High Time 4.5 ns tCLL Serial Clock Low Time 4.5 ns tCLCH Serial Clock Rise Time (Slew Rate) 0.1 V/ns tCHCL Serial Clock Fall Time (Slew Rate) 0.1 V/ns tSLCH CS# Active Setup Time 5 ns tCHSH CS# Active Hold Time 5 ns tSHCH CS# Not Active Setup Time 5 ns tCHSL CS# Not Active Hold Time 5 ns tSHSL CS# High Time (read/write) 20 ns tSHQZ Output Disable Time 6 ns tCLQX Output Hold Time 1.0 ns tDVCH Data In Setup Time 2 ns tCHDX Data In Hold Time 2 ns tCLQV Clock Low To Output Valid 7 ns tDP CS# High To Deep Power-Down Mode 20 μs tRES1 CS# High To Standby Mode Without Electronic Signature Read 30 μs tRES2 CS# High To Standby Mode With Electronic Signature Read 30 μs tSUS CS# High To Next Command After Suspend 20 μs tRS Latency Between Resume And Next Suspend 100 μs tRST CS# High To Next Command After Reset (Except From Erase) 30 μs tRST_E CS# High To Next Command After Reset (From Erase) 12 ms tW Write Status Register Cycle Time 5 30 ms tBP1 Byte Program Time (First Byte) 30 60 μs tBP2 Additional Byte Program Time (After First Byte) 2.5 15 μs tPP Page Programming Time 0.5 4 ms tSE Sector Erase Time 50 400 ms tBE1 Block Erase Time (32K Bytes) 0.16 2 s tBE2 Block Erase Time (64K Bytes) 0.3 3 s tCE Chip Erase Time (GD25B127D) 50 150 s Note: 1. Typical value tested at T = 25℃. 2. Value guaranteed by design and/or characterization, not 100% tested in production. |
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