Uniform Sector

Standard and Dual Serial Flash

GD25WD80C

8

4. DEVICE OPERATION

SPI Mode

Standard SPI

The GD25WD80C features a serial peripheral interface on 4 signals bus: Serial Clock (SCLK), Chip Select (CS#),

Serial Data Input (SI) and Serial Data Output (SO). Both SPI bus mode 0 and 3 are supported. Input data is latched on the

rising edge of SCLK and data shifts out on the falling edge of SCLK.

Dual SPI

The GD25WD80C supports D

ual Output operation when using the “Dual Output Fast Read” (3BH) commands. These

commands allow data to be transferred to or from the device at twice the rate of the standard SPI. When using the Dual

Output command the SI and SO pins become bidirectional I/O pins: IO0 and O1.