GD25VQ127CSFS datasheet(27/62 Pages) GIGADEVICE

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Uniform Sector

Dual and Quad Serial Flash

GD25VQ127C

the other bytes of the same page. CS# must be driven high after the eighth bit of the last data byte has been latched in;

otherwise the Quad Page Program (PP) command is not executed.

As soon as CS# is driven high, the self-timed Quad Page Program cycle (whose duration is tPP) is initiated. While the

Quad Page Program cycle is in progress, the Status Register may be read to check the value of the Write In Progress (WIP)

bit. The Write in Progress (WIP) bit is 1 during the self-timed Quad Page Program cycle, and is 0 when it is completed. At

some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.

A Quad Page Program command applied to a page which is protected by the Block Protect (BP4, BP3, BP2, BP1,

and BP0) is not executed.

Figure17.Quad Page Program Sequence Diagram

7.16.

Sector Erase (SE) (20H)

The Sector Erase (SE) command is erased the all data of the chosen sector. A Write Enable (WREN) command must

previously have been executed to set the Write Enable Latch (WEL) bit. The Sector Erase (SE) command is entered by

driving CS# low, followed by the command code, and 3-address byte on SI. Any address inside the sector is a valid address

for the Sector Erase (SE) command. CS# must be driven low for the entire duration of the sequence.

The Sector Erase command sequence: CS# goes low  sending Sector Erase command  3-byte address on SI 

CS# goes high. The command sequence is shown in Figure18. CS# must be driven high after the eighth bit of the last

address byte has been latched in; otherwise the Sector Erase (SE) command is not executed. As soon as CS# is driven

high, the self-timed Sector Erase cycle (whose duration is tSE) is initiated. While the Sector Erase cycle is in progress, the

Command

32H

CS#

SCLK

9 10

28 29 30 31

23 22 21

24-bit address

32 33 34 35

MSB

36 37 38 39

SI(IO0)

SO(IO1)

WP#(IO2)

HOLD#(IO3)

Byte1 Byte2

CS#

SCLK

SI(IO0)

SO(IO1)

WP#(IO2)

HOLD#(IO3)

42 43 44 45

46 47

50 51 52 53

54 55

Byte11

Byte12

Byte253

Byte256

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