ADPA7002CHIP datasheet(21/23 Pages) AD

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Data Sheet

ADPA7002CHIP

Rev. 0 | Page 21 of 23

Testing the HMC980LP4E

After biasing the ADPA7002CHIP with the HMC980LP4E at the application nodes, compare the results to Figure 63 to Figure 66 to verify

that the biasing procedure is correct.

Figure 63. IDD vs. Input Power (PIN), VDD = 5 V, Frequency = 32 GHz,

Constant Current Bias and Constant Voltage Bias

Figure 64. POUT vs. PIN, VDD = 5 V, Frequency = 32 GHz,

Constant Current Bias and Constant Voltage Bias

Figure 65. PAE vs. PIN, VDD = 5 V, Frequency = 32 GHz,

Constant Current Bias and Constant Voltage Bias

Figure 66. Output P1dB vs. PIN, VDD = 5 V, Frequency = 32 GHz

Constant Current Bias and Constant Voltage Bias

400

500

600

700

800

900

1000

1100

1200

–6

–4

–2

PIN (dBm)

CONSTANT GATE VOLTAGE BIAS

CONSTANT DRAIN CURRENT BIAS

–4

–6

–2

CONSTANT GATE VOLTAGE BIAS

CONSTANT DRAIN CURRENT BIAS

PIN (dBm)

–6

–4

–2

PIN (dBm)

CONSTANT GATE VOLTAGE BIAS

CONSTANT DRAIN CURRENT BIAS

PIN (dBm)

CONSTANT GATE VOLTAGE BIAS

CONSTANT DRAIN CURRENT BIAS

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