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TUSB8043AI 数据表(PDF) 49 Page - Texas Instruments |
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TUSB8043AI 数据表(HTML) 49 Page - Texas Instruments |
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49 / 56 page ![]() 49 TUSB8043A www.ti.com SLLSF94 – JUNE 2019 Product Folder Links: TUSB8043A Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 10 Power Supply Recommendations 10.1 TUSB8043A Power Supply VDD should be implemented as a single power plane, as should VDD33. • The VDD pins of the TUSB8043A supply 1.1 V (nominal) power to the core of the TUSB8043A. This power rail can be isolated from all other power rails by a ferrite bead to reduce noise. • The DC resistance of the ferrite bead on the core power rail can affect the voltage provided to the device due to the high current draw on the power rail. The output of the core voltage regulator may need to be adjusted to account for this or a ferrite bead with low DC resistance (less than 0.05 Ω) can be selected. • The VDD33 pins of the TUSB8043A supply 3.3 V power rail to the I/O of the TUSB8043A. This power rail can be isolated from all other power rails by a ferrite bead to reduce noise. • All power rails require a 10 µF capacitor or 1 µF capacitors for stability and noise immunity. These bulk capacitors can be placed anywhere on the power rail. The smaller decoupling capacitors should be placed as close to the TUSB8043A power pins as possible with an optimal grouping of two of differing values per pin. 10.2 Downstream Port Power • The downstream port power, VBUS, must be supplied by a source capable of supplying 5V and up to 900 mA per port. Downstream port power switches can be controlled by the TUSB8043A signals. It is also possible to leave the downstream port power always enabled. • A large bulk low-ESR capacitor of 22 µF or larger is required on each downstream port’s VBUS to limit in-rush current. • The ferrite beads on the VBUS pins of the downstream USB port connections are recommended for both ESD and EMI reasons. A 0.1µF capacitor on the USB connector side of the ferrite provides a low impedance path to ground for fast rise time ESD current that might have coupled onto the VBUS trace from the cable. 10.3 Ground It is recommended that only one board ground plane be used in the design. This provides the best image plane for signal traces running above the plane. The thermal pad of the TUSB8043A and any of the voltage regulators should be connected to this plane with vias. An earth or chassis ground is implemented only near the USB port connectors on a different plane for EMI and ESD purposes. |
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