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56F8167 数据表(PDF) 124 Page - Freescale Semiconductor, Inc |
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56F8167 数据表(HTML) 124 Page - Freescale Semiconductor, Inc |
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124 / 184 page  56F8367 Technical Data, Rev. 7.0 124 Freescale Semiconductor Preliminary 6.5.9.1 External Memory Interface Enable (EMI)—Bit 15 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.2 Analog-to-Digital Converter B Enable (ADCB)—Bit 14 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.3 Analog-to-Digital Converter A Enable (ADCA)—Bit 13 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.4 FlexCAN Enable (CAN)—Bit 12 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.5 Decoder 1 Enable (DEC1)—Bit 11 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.6 Decoder 0 Enable (DEC0)—Bit 10 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.7 Quad Timer D Enable (TMRD)—Bit 9 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) 6.5.9.8 Quad Timer C Enable (TMRC)—Bit 8 Each bit controls clocks to the indicated peripheral. • 1 = Clocks are enabled • 0 = The clock is not provided to the peripheral (the peripheral is disabled) |
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