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STLC1510 数据表(PDF) 20 Page - STMicroelectronics

部件名 STLC1510
功能描述  NorthenLite G.lite DMT Transceiver
PDF  40 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STLC1510 数据表(HTML) 20 Page - STMicroelectronics

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5.9 Digital Front End (DFE)
The Digital Front End (DFE) block contains dedicated
hardware to map signals between the analog inter-
face (AFE) and the BPU.
The DFE block has the following features:
s
It performs part of the sampling rate conversion
between the AFE sampling rate and the 2x
symbol rate of the BPU.
s
It provides the necessary digital hardware to
implement an analog-based AGC.
s
It provides the necessary buffering to provide
DMT symbol alignment within the BPU.
s
It provides the facilities to allow timing recovery
in CPE mode. This consists of a digital phase
interpolator and a digital
Σ∆ D/A convertor
s
Two loopback modes are provided in this block.
s
Various bypass modes are provided to allow
observation and isolation of any block in the
DFE for test purposes.
s
Interface to the LAMBA Bus.
5.9.1 Application Description
Figure 7. shows the application of the various DFE
components when used in a CO (network) and CPE
(remote) applications.
5.9.2 Interface Description
The registers accessible by the EPM are:
s
Decimator oversampling ratio
s
Decimator order.
s
Various loopback and bypass modes.
s
Number of bits transferred to the Aloha ASIC
DAC.
s
AFE control registers.
s
ADC clip counter.
s
RSM parameters such as time constant, peak
detector thresholds, peak detector modes,
integrator initialization, and detector outputs.
s
IIR coefficients.
s
Predictor IIR filter coefficients.
s
Frame synchronization buffer length
s
Timing recovery (crystal) control word.
s
Timing recovery
Σ∆ dither level selection.
s
CO/CPE mode selection.
s
Phase interpolator parameters such as alpha,
frequency error and frequency error gain.
s
CO peak detector parameters such as set-up
and hold delays, threshold, and slew rate.
Figure 7. DFE Application Diagram
II R
I n terpola tin g
CS D F I R
II R
BP U
BP U
An a lo g
Do m a i n
In te rp
CS D
CI C
Filter
FIFO
FIFO
DA C
AD C
DA C
AD C
S TLC 15 1 0 (C O)
S TLC 15 20 (C P E )
DF E
DF E
CIC
F ilter
P
CIC
F ilter
FI R
CIC
F ilter
RS M
RS M
Σ∆
optional
PI F
PD
Dly



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