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CS8421 数据表(PDF) 32 Page - Cirrus Logic

部件名 CS8421
功能描述  32-bit, 192 kHz Asynchronous Sample Rate Converter
PDF  36 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS8421 数据表(HTML) 32 Page - Cirrus Logic

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CS8421
32
DS641PP1
9. APPLICATIONS
9.1
Reset, Power Down, and Start-up
When RST is low the CS8421 enters a low power mode, all internal states are reset, and the outputs are
disabled. After RST transitions from low to high the part senses the resistor value on the configuration
pins (MS_SEL, SAIF, and SAOF) and sets the appropriate mode of operation. After the mode has been
set (approximately 4
µs) the part is set to normal operation and all outputs are functional.
9.2
Power Supply, Grounding, and PCB layout
The CS8421 operates from a VD = +2.5 V and VL = +3.3 V or +5.0 V supply. These supplies may be set
independently. Follow normal supply decoupling practices, see Figure 5.
Extensive use of power and ground planes, ground plane fill in unused areas, and surface mount decou-
pling capacitors are recommended. Decoupling capacitors should be mounted on the same side of the
board as the CS8421 to minimize inductance effects and all decoupling capacitors should be as close to
the CS8421 as possible. The pin of the configuration resistors not connected to MS_SEL, SAIF, and
SAOF should be connected as close as possible to VL or GND.



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