L6983 datasheet(61/63 Pages) STMICROELECTRONICS

61 / 63 page

List of figures

Figure 1.

Block diagram .................................................................... 3

Figure 2.

Pin connection (top through view) ....................................................... 4

Figure 3.

Basic application (adjustable version) .................................................... 6

Figure 4.

Power-up/down behavior ............................................................ 12

Figure 5.

Soft-start procedure ............................................................... 13

Figure 6.

Soft-start phase with IOUT = 2.5 A ...................................................... 13

Figure 7.

Light load operation................................................................ 14

Figure 8.

LCM operation with ISKIP = 600 mA typ. at zero load. L = 15 µH; COUT = 40 µF....................... 15

Figure 9.

LCM operation over loading condition (part 1-pulse skipping) ................................... 15

Figure 10.

LCM operation over loading condition (part 2-pulse skipping) ................................... 16

Figure 11.

LCM operation over loading condition (part 3-pulse skipping) ................................... 16

Figure 12.

LCM operation over loading condition (part 4-CCM) ......................................... 17

Figure 13.

Low noise mode operation at zero load .................................................. 18

Figure 14.

Light-load efficiency for low consumption mode and low noise mode - linear scale..................... 19

Figure 15.

Light-load efficiency for low consumption mode and low noise mode - log scale ...................... 19

Figure 16.

Load regulation for LCM and LNM. VIN = 24 V; VOUT = 5 V; FSW = 400 kHz - linear scale................ 20

Figure 17.

Load regulation for low noise mode. VIN = 24 V; VOUT = 5 V; FSW = 400 kHz - log scale................. 20

Figure 18.

Switch-over ..................................................................... 21

Figure 19.

Over current protection behavior ....................................................... 22

Figure 20.

Soft-start procedure with VOUT shorted to GND............................................. 23

Figure 21.

Over current procedure with persistent short circuit between VOUT and GND ........................ 24

Figure 22.

PGOOD thresholds ................................................................ 25

Figure 23.

Block diagram of the loop............................................................ 26

Figure 24.

Trans-conductance embedded error amplifier .............................................. 27

Figure 25.

Leading network example ........................................................... 28

Figure 26.

Leading network example ........................................................... 29

Figure 27.

External synchronization. Direct connection................................................ 29

Figure 28.

External synchronization. AC coupling ................................................... 30

Figure 29.

Application circuit ................................................................. 31

Figure 30.

Evaluation board schematic .......................................................... 34

Figure 31.

Top layer ....................................................................... 36

Figure 32.

Bottom layer..................................................................... 36

Figure 33.

Efficiency VIN = 24 V; VOUT = 5 V; FSW = 0.4 MHZ .......................................... 37

Figure 34.

Efficiency VIN = 24 V; VOUT = 5 V; FSW = 0.4 MHZ (log scale)................................... 37

Figure 35.

Power losses VIN = 24 V; VOUT = 5 V; FSW = 0.4 MHZ ........................................ 38

Figure 36.

Efficiency VIN = 12 V; VOUT = 5 V; FSW = 0.4 MHZ .......................................... 38

Figure 37.

Efficiency VIN = 12 V; VOUT = 5 V; FSW = 0.4 MHZ (log scale)................................... 39

Figure 38.

Power losses VIN = 12 V; VOUT = 5 V; FSW = 0.4 MHZ ........................................ 39

Figure 39.

Efficiency VIN = 24 V; VOUT = 3.3 V; FSW = 0.4 MHZ ......................................... 40

Figure 40.

Efficiency VIN = 24 V; VOUT = 3.3 V; FSW = 0.4 MHZ (log scale) ................................. 40

Figure 41.

Power losses VIN = 24 V; VOUT = 3.3 V; FSW = 0.4 MHZ ...................................... 41

Figure 42.

Efficiency VIN = 12 V; VOUT = 3.3 V; FSW = 0.4 MHZ ......................................... 42

Figure 43.

Efficiency VIN = 12 V; VOUT = 3.3 V; FSW = 0.4 MHZ (log scale) ................................. 42

Figure 44.

Power losses VIN = 12 V; VOUT = 3.3 V; FSW = 0.4 MHZ ...................................... 43

Figure 45.

Efficiency VIN = 24 V; VOUT = 3.3 V; FSW = 1.0 MHZ ......................................... 44

Figure 46.

Efficiency VIN = 24 V; VOUT = 3.3 V; FSW = 1.0 MHZ (log scale) ................................. 44

Figure 47.

Power losses VIN = 24 V; VOUT = 3.3 V; FSW = 1.0 MHZ ...................................... 45

Figure 48.

Efficiency VIN = 12 V; VOUT = 3.3 V; FSW = 1.0 MHZ ......................................... 46

Figure 49.

Efficiency VIN = 12 V; VOUT = 3.3 V; FSW = 1.0 MHZ (log scale) ................................. 46

L6983

List of figures

DS13116 - Rev 1

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