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PRELIMINARY
CY28344
Document #: 38-07113, Rev. *A
Page 6 of 22
Data Byte 2
Bit
Pin#
Name
Pin Description
Power On
Default
Bit 7
--
Reserved
Reserved
0
Bit 6
17
PCI6
(Active/Inactive)
1
Bit 5
16
PCI5
(Active/Inactive)
1
Bit 4
15
PCI4
(Active/Inactive)
1
Bit 3
12
PCI3
(Active/Inactive)
1
Bit 2
11
PCI2
(Active/Inactive)
1
Bit 1
10
PCI1
(Active/Inactive)
1
Bit 0
9
PCI0
(Active/Inactive)
1
Data Byte 3
Bit
Pin#
Name
Pin Description
Power On
Default
Bit 7
34
24_48MHz
(Active/Inactive)
1
Bit 6
35
48MHz
(Active/Inactive)
1
Bit 5
--
Reserved
Reserved
0
Bit 4
--
Reserved
Reserved
0
Bit 3
31
3V66_0/VCH_CLK
0 = 66 MHz; 1 = 48 MHz
0
Bit 2
31
3V66_0/VCH_CLK
(Active/Inactive)
1
Bit 1
6
PCI_F1
(Active/Inactive)
1
Bit 0
5
PCI_F0
(Active/Inactive)
1
Data Byte 4
Bit
Pin#
Name
Pin Description
Power On
Default
Bit 7
--
MULTSEL_Override
This bit control the selection of IREF multiple.
0 = HW control; IREF multiplier is determined by
MULTSEL[0:1] input pins
1 = SW control; IREF multiplier is determined by Byte[4],
Bit[5:6].
0
Bit 6
--
SW_MULTSEL1
IREF multiplier
00 = Ioh is 4 × IREF
01 = Ioh is 5 × IREF
10 = Ioh is 6 × IREF
11 = Ioh is 7 × IREF
0
Bit 5
--
SW_MULTSEL0
0
Bit 4
48
REF_2X
(Active/Inactive) Drive
1
Bit 3
--
REF_DRV
0 = Normal, 1 = HIGH
0
Bit 2
22
3V66_3
(Active/Inactive)
1
Bit 1
21
3V66_2
(Active/Inactive)
1
Bit 0
20
3V66_1
(Active/Inactive)
1
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