CY28344PVC datasheet(8/22 Pages) CYPRESS

8 / 22 page

PRELIMINARY

CY28344

Document #: 38-07113, Rev. *A

Page 8 of 22

Bit 5

WD_TIMER4

These bits store the time-out value of the Watchdog timer.

The scale of the timer is determine by the pre-scaler. The

timer can support values from 150 ms – 4.8 sec when the

pre-scaler is set to 150 ms. If the pre-scaler is set to 2.5

sec, it can support a value from 2.5 – 80 seconds. When

the Watchdog timer reaches “0”, it will set the

WD_TO_STATUS bit and generate Reset if RST_EN_WD

is enabled.

Bit 4

WD_TIMER3

Bit 3

WD_TIMER2

Bit 2

WD_TIMER1

Bit 1

WD_TIMER0

Bit 0

WD_PRE_SCALER

0 = 150 ms

1 = 2.5 sec

Data Byte 8 (continued)

Bit

Pin#

Name

Pin Description

Power On

Default

Data Byte 9

Bit

Pin#

Name

Pin Description

Power On

Default

Bit 7

48MHz_DRV

48MHz and 24_48MHz clock output drive strength

0 = Normal

1 = High Drive

Bit 6

PCI_DRV

PCI clock output drive strength

0 = Normal

1 = High Drive

Bit 5

3V66_DRV

3V66 clock output drive strength

0 = Normal

1 = High Drive

Bit 4

RST_EN_WD

This bit will enable the generation of a Reset pulse when

a Watchdog timer time-out occurs.

0 = Disabled

1 = Enabled

Bit 3

RST_EN_FC

This bit will enable the generation of a Reset pulse after a

frequency change occurs.

0 = Disabled

1 = Enabled

Bit 2

WD_TO_STATUS

Watchdog Timer Time-out Status bit

0 = No time-out occurs (Read); Ignore (Write)

1 = time-out occurred (Read); Clear WD_TO_STATUS

(Write)

Bit 1

WD_EN

0 = Stop and re-load Watchdog timer

1 = Enable Watchdog timer. It will start counting down after

a frequency change occurs. Note: CY28344 will generate

system reset, reload a recovery frequency, and lock itself

into a recovery frequency mode after a Watchdog timer

time-out occurs. Under recovery frequency mode,

CY28344 will not respond to any attempt to change output

frequency via the SMBus control bytes. System software

can unlock CY28344 from its recovery frequency mode by

clearing the WD_EN bit.

Bit 0

Reserved

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