PRELIMINARY
CY28344
Document #: 38-07113, Rev. *A
Page 2 of 22
Pin Definitions
Pin Name
Pin No.
Pin
Type
Pin Description
X1
2
I
Crystal Connection or External Reference Frequency Input: This pin has dual
functions. It can be used as an external 14.318-MHz crystal connection or as an
external reference frequency input.
X2
3
O
Crystal Connection: Connection for an external 14.318-MHz crystal. If using an
external reference, this pin must be left unconnected.
REF_2X/FS2
48
I/O
Reference Clock/Frequency Select 2: 3.3V 14.318-MHz clock output. This pin
also serves as a power-on strap option to determine device operating frequency as
described in the Frequency Selection Table.
MULTSEL0
38
I
Current Multiplier Selection 0: 3.3V input to select the current multiplier for CPU
clock outputs. The MULTSEL0 is as follows:
MULTSEL0
0 = Ioh is 4 × IREF
1 = Ioh is 6 × IREF
CPU0:2, CPU0:2#
47, 44, 40,
46, 43,39
O
CPU Clock Outputs: Frequency is set by the FS0:4 inputs or through serial input
interface.
3V66_1:3
20, 21, 22
O
66MHz Clock Outputs: 3.3V 66-MHz clock.
3V66_0/VCH_CLK/F
S4
31
I/O
66MHz Clock Output/Frequency Select 4: 3.3V 66-MHz or 48-MHz clock output.
The selection is determined by the control byte register. This pin also serves as a
power-on strap option to determine device operating frequency as described in the
Frequency Selection Table.
PCI_F0/FS0
5
I/O
Free-running PCI Output 0/Frequency Select 0: 3.3V free-running PCI output.
This pin also serves as a power-on strap option to determine device operating
frequency as described in the Frequency Selection Table.
PCI_F1/FS1
6
I/O
Free-running PCI Output 1/Frequency Select 1: 3.3V free-running PCI output.
This pin also serves as a power-on strap option to determine device operating
frequency as described in the Frequency Selection Table.
PCI0:6
9, 10, 11,
12, 15, 16,
17
O
PCI Clock Output 0 to 6: 3.3V PCI clock outputs.
48MHz/FS3
35
I/O
48MHz Output/Frequency Select 3: 3.3V fixed 48-MHz, non-spread spectrum
output. This pin also serves as a power-on strap option to determine device
operating frequency as described in the Frequency Selection Table.
24_48MHz
34
I/O
24 or 48MHz Output: 3.3V fixed 24-MHz or 48-MHz non-spread spectrum output.
SCLK
28
I
SMBus Clock Input: Clock pin for serial interface.
SDATA
27
I/O
SMBus Data Input: Data pin for serial interface.
RST#
23
O
(open-
drain)
System Reset Output: Open-drain system reset output.
IREF
37
I
Current Reference for CPU output: A precision resistor is attached to this pin,
which is connected to the internal current reference.
VTT_PWRGD/PD#
26
I
Powergood from Voltage Regulator Module (VRM)/PD#: 3.3V LVTTL input.
VTT_PWRGD# is a level sensitive strobe used to determine when FS0:4 and
MULTSEL0 inputs are valid and OK to be sampled (Active HIGH).
VDD_REF,
VDD _PCI,
VDD_48MHz,
VDD_3V66,
VDD_CPU
1, 7, 13, 18,
30, 33, 41,
45
P
3.3V Power Connection: Power supply for CPU outputs buffers, 3V66 output
buffers, PCI output buffers, reference output buffers and 48-MHz output buffers.
Connect to 3.3V.
VDD_48MHz
33
P
3.3V Power Connection: 48MHz output buffers. Connect to 3.3V.
GND_PCI,
GND_48MHz,
GND_3V66,
GND_CPU,
GND_REF,
4, 8, 14, 19,
29, 32, 36,
42
G
Ground Connection: Connect all ground pins to the common system ground
plane.
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