HCS473-SLROM datasheet(35/68 Pages) MICROCHIP

35 / 68 page

 2002 Microchip Technology Inc.

Preliminary

DS40035C-page 33

HCS473

FIGURE 3-22:

Calculating Communication T

3.2.8

RFEN DURING LF

COMMUNICATION (Figure 3-23)

3.2.8.1

Wake-up Sequence

The wake-up Acknowledge sequence has the shortest,

but fixed, PLL setup time, 1LF

TE.

3.2.8.2

Transponder Select Sequence

PLL setup occurs on the rising edge of the first VID bit

in anticipation of the TID Acknowledge. The setup time

before the ACK begins is therefore a function of...

• LF baud rate

• VID value

• TID value

3.2.8.3

ACK Response Sequences

Concluding with CRC

Command sequences ending with CRC bits and

expecting an Acknowledge response have a similar

PLL setup sequence. This includes “Present Transport

Code”, “Write” and “Anticollision Off”.

PLL setup occurs on the rising edge of the first CRC bit

in anticipation of the Acknowledge. The setup time is

therefore a function of...

• LF baud rate

• CRC value

• Response time: T

TPACK, TWRT, TAOACK.

3.2.8.4

Data Response Sequences

Concluding with CRC

Command sequences ending with CRC bits and

expecting data response (code hopping word) have a

similar PLL setup sequence. This includes “IFF”,

“Read” and “Request Hopping Code”.

PLL setup occurs on the rising edge of the first CRC bit

in anticipation of the data transmission. The setup time

is therefore a function of...

• LF baud rate

• CRC value

• Response time: T

IFF, TREAD, THOP.

Communication from reader to HCS473

Communication from HCS473 to reader

8LF

Command

CMD

SKIPACK = 0 - Field Acknowledge sent when device wakes

Inductive

(LC)

Response

(DATA)

125 kHz Field

(on LC pins)

CMD

3LF

TE 3LFTE

Simultaneous LF

Acknowledge

(LFRSP=1)

RF Acknowledge

(RFRSP=1)

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