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HCS473-SLROM 数据表(PDF) 54 Page - Microchip Technology |
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HCS473-SLROM 数据表(HTML) 54 Page - Microchip Technology |
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54 / 68 page  HCS473 DS40035C-page 52 Preliminary 2002 Microchip Technology Inc. TABLE 7-3: AC CHARACTERISTICS, FOSC = 4 MHz(1) AC Characteristics F OSC = 4 MHz (1) The min and max values below are due to HCS473 algorithm tolerances, not variations due to supply voltage and temperature. Symbol Min Typ Max Description General HCS473 Timing T DB — 10 ms — Debounce Time T QUE — 2s — Que Window T PU — 10.9 ms — Power-up Delay Time (includes button debounce) T PLL — 19 ms — Encoder Mode PLL activation to first code word T LEDON — 100 ms — LED ON Time T LEDOFF — 500 ms — LED OFF Time Communication from Transponder Reader to HCS473 T CMD 1LF TE+100 µs — 10.2 ms T TSCMD 1LF TE+100 µs — 10.2 ms Delay from Transponder Select ACK to next command T FINH 100 µs 1LF TE — Time to leave LF on after last data bit’s rising edge Response from HCS473 to Transponder Reader T SF 1ms+1LF TE 3.5ms+1LF TE 10ms+1LF TE Delay to wake-up Acknowledge sequence T TSACK 1LF TE+16 µs 1LF TE-11 µs 1LF TE+30 µs 1 LF TE 1LF TE+44 µs 1LF TE+11 µs Delay from TID pulse rising edge to TID Acknowledge TID = 0 TID > 0 T TPACK 157 µs 179 µs 212 µs Delay to Transport Code Acknowledge T WRT — 4 ms 10 ms Delay to Write Acknowledge T AOACK 67 µs89 µs 122 µs Delay to anticollision off Acknowledge T IFF — 5.64ms — Delay to IFF response - RF or LF response T READ 205 µs 227 µs 260 µs Delay to read response - RF or LF response T HOP — 19 ms — Delay to hopping code response - RF or LF response T DAMP — 1.2 LF TE — Delay from detecting LC rising edge to first damp pulse T DEMOD — 16.4 ms — Demodulator mode window looking for edge on LC pin Timing Element T E T E 90 180 360 720 100 200 400 800 110 220 440 880 RFT E or LFTE RFBSL = LFBSL = 002 RFBSL = LFBSL = 012 RFBSL = LFBSL = 102 RFBSL = LFBSL = 112 Analog delays T FILTR —15 µs — HCS473 analog LF filter charge time T FILTF —70 µs — HCS473 analog LF filter discharge time T ANTR Hardware design dependent Cumulative LF antenna delay when field is turned on T ANTF Hardware design dependent Cumulative LF antenna delay when field is turned off Note 1: F OSC = 4 MHz may be centered at the designer’s choice of supply voltage (VDD) and temperature. 2: LF TE is based on the HCS473’s timing, not the timing of the transponder reader. Therefore LFTE is subject to HCS473 oscillator variation. 3: Response timing accounts for TFILTR but not for TANTR or TANTF, as they are design dependent. The system designer must compensate communication accordingly for TANTR and TANTF. 4: Timing parameters are characterized but not tested. |
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