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ADP1074ACCZ-R7 数据表(PDF) 12 Page - Analog Devices |
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ADP1074ACCZ-R7 数据表(HTML) 12 Page - Analog Devices |
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12 / 32 page ![]() ADP1074 Data Sheet Rev. D | Page 12 of 32 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NGATE 1 PGATE 2 PGND1 3 AGND1 4 SR1 24 SR2 23 PGND2 22 AGND2 21 VREG1 5 VREG2 20 VIN 6 VDD2 19 EN 7 OVP 18 CS 8 FB 17 RT 9 COMP 16 SYNC 10 SS2 15 SS1 11 PGOOD 14 DMAX 12 MODE 13 ADP1074 (Not to Scale) TOP VIEW Figure 4. 24-Lead SOIC_W Pin Configuration AGND1 COMP 4 VREG1 5 VIN 6 EN 7 CS 8 RT 9 13 14 15 16 FB 17 OVP 18 VDD2 19 VREG2 20 AGND2 21 22 23 24 1 2 3 TOP VIEW (TERMINAL SIDE DOWN) Not to Scale ADP1074 10 11 12 AGND1 AGND2 Figure 5. 24-Terminal LGA Pin Configuration Table 12. Pin Function Descriptions Pin No. Mnemonic Description 1 NGATE Driver Output for the Main Power MOSFET on the Primary Side. Multiple function pin. Connect a resistor from NGATE to PGND1 to set up the predetermined dead time between PGATE and SR2. 2 PGATE Driver for the Active Clamp MOSFET of the Forward Topology. This pin is referenced to PGND1. 3 PGND1 Power Ground on the Primary Side. Star connect this pin to AGND1. 4 AGND1 Analog Ground on the Primary Side. Star connect this pin to PGND1. Use this pin to differentially sense the primary current sensed with the sense resistor between the CS and AGND1 pins. 5 VREG1 8 V Output for the MOSFET Drivers. Connect 1 μF or greater at this pin. Do not put an external load on this pin. Reference this pin to PGND1. 6 VIN Input Voltage. Connect a 4.7 μF capacitor to this pin. The size of this capacitor can be reduced if the input voltage to this pin is guaranteed stable. Reference this pin to PGND1. 7 EN Precision Enable Input. The controller is enabled when the voltage at the EN pin is above the EN threshold voltage. Soft stop is enabled when EN drops below the EN threshold voltage. This pin also has a programmable EN hysteresis. Reference this pin to AGND1. 8 CS Input Current Sensing. This pin senses the input pulse width modulated current. Place a current sense resistor between the source terminal of the power MOSFET and PGND1. This current sense resistor sets up the input current limit. This pin is also used for an external slope compensator. Connect a resistor from CS to the current sense resistor to generate a voltage ramp for the slope compensation. Reference this pin to AGND1. Connect a 33 pF to 100 pF capacitor to this pin to act as a resistor capacitor (RC) filter along with the slope compensation resistor in noisy environments. 9 RT Switching Period Resistor. Connect two resistors in series that sum up to the appropriate resistor from RT to AGND1 to set the switching frequency. See the DMAX pin for more information. Also see the Frequency Setting (RT Pin) section and the Maximum Duty Cycle section for the relevant equations. 10 SYNC Frequency Synchronization. Connect an external clock to the SYNC pin to synchronize the internal oscillator to this external clock frequency. Connect SYNC to AGND1 if this feature is not used. It is recommended that the SYNC frequency be within 10% of the frequency set by the RT pin. 11 SS1 Soft Start 1. Connect a capacitor at this pin to set up the open-loop soft start time. Reference this pin to AGND1. 12 DMAX Maximum Duty Cycle Control. Connect DMAX to the center tap of the resistive divider at the RT pin to set up the maximum duty cycle. See the Frequency Setting (RT Pin) section and the Maximum Duty Cycle section for the relevant equations. 13 MODE Light Load Mode Setting. Connect MODE to AGND2 to disable discontinuous conduction mode (DCM) operation, or to a high logic (2.5 V or higher, such as the VREG2 pin) to force LLM operation, or to a resistor to set up a fixed LLM threshold voltage. 14 PGOOD Power Good Pin. Open-drain output. Connect a pull-up resistor from PGOOD to VREG2. 15 SS2 Soft Start on the Secondary Side. Connect a capacitor from SS2 to AGND2 to set up the soft start time on the secondary side. |
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