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BLUENRG-LP 数据表(PDF) 48 Page - STMicroelectronics |
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BLUENRG-LP 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 72 page ![]() 5.3.14 Flash memory characteristics The characteristics below are guaranteed by design. Table 31. Flash memory characteristics Symbol Parameter Test conditions Typ. Max. Unit tprog 32-bit programming time 20 40 µs tprog_burst 4x32-bit burst programming time 20 40 tERASE Page (2 kbyte) erase time 20 40 ms tME Mass erase time 20 40 IDD Average consumption from VDD Write mode 3 mA Erase mode 3 Mass erase 5 Table 32. Flash memory endurance and data retention Symbol Parameter Test conditions Min. Unit NEND Endurance TA = -40 to +105 ºC 10 kcycles tRET Data retention TA = 105 ºC 10 Years 5.3.15 Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts x (n + 1) supply pins). This test conforms to the ANSI/JEDEC standard. Table 33. ESD absolute maximum ratings Symbol Parameter Conditions Class Max.(1) Unit VESD(HBM) Electrostatic discharge voltage (human body model) Conforming to ANSI/ESDA/JEDEC JS-001 2 2000 V VESD(CBM) Electrostatic discharge voltage (charge device model) Conforming to ANSI/ESDA/STM5.3.1 JS-002 C2a 500 1. Guaranteed by design. 5.3.16 I/O port characteristics Unless otherwise specified, the parameters given in the tables below are derived from tests performed under the conditions summarized in Section 5.3.2 General operating conditions. All I/Os are designed as CMOS-compliant. The characteristics below are guaranteed by characterization. Table 34. I/O static characteristics Symbol Parameter Conditions Min. Typ. Max. Unit VIL I/O input low level voltage 1.62 V < VDD < 3.6 V 0.3 x VDD V VIH I/O input high level voltage 0.7 x VDD Ilkg Input leakage current 0 <= VIN <= Max(VDDx)(1) +/-100 nA Max(VDDx)(1) <= VIN <= Max(VDDx)(1) +1 V 650 Max(VDDx)(1) + 1 V < VIN <= 5.5 V 200 BlueNRG-LP Operating conditions DS13282 - Rev 2 page 48/72 |
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