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BLUENRG-LP 数据表(PDF) 13 Page - STMicroelectronics |
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BLUENRG-LP 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 72 page ![]() In DEEPSTOP mode: • The system and the bus clocks are stopped • Only the essential digital power domain is ON and supplied at 1.0 V • The bank RAM0 is kept in retention • The other banks of RAM can be in retention or not, depending on the software configuration • The low speed clock can be running or stopped, depending on the software configuration: – ON or OFF – Sourced by LSE or by LSI • The RTC and the IWDG stay active, if enabled and the low speed clock is ON • The radio wake-up block, including its timer, stay active (if enabled and the low speed clock is ON) • Eight I/Os (PA4/ PA5/ PA6/ PA7/ PA8/ PA9/ PA10/ PA11) can be in output driving: – A static low or high level – The low speed clock – The RTC output Possible wake-up sources are: • The radio block is able to generate two events to wake up the system through its embedded wake-up timer running on low speed clock: – Radio wake-up time is reached – CPU host wake-up time is reached • The RTC can generate a wake-up event • The IWDG can generate a reset event • Up to 28 GPIOs are able to wake up the system (PA0 to PA15 and PB0 to PB11) At the wake-up, all the hardware resources located in the digital power domain that are OFF during the DEEPSTOP mode, are reset. The CPU reboots. The wake-up reason is visible in the register of the power controller. 1.7.3 SHUTDOWN mode The SHUTDOWN mode is the least power consuming mode. The conditions to enter SHUTDOWN mode are the same conditions needed to enter DEEPSTOP mode except that the LPMS bit of the power controller unit is 1. In SHUTDOWN mode, the BlueNRG-LP is in ultra-low power consumption: all voltage regulators, clocks and the RF interface are not powered. The BlueNRG-LP can enter shutdown mode by internal software sequence. The only way to exit shutdown mode is by asserting and deasserting the RSTN pin. In SHUTDOWN mode: • The system is powered down as both the regulators are OFF • The VDDIO power domain is ON • All the clocks are OFF, LSI and LSE are OFF • The I/Os pull-up and pull-down can be controlled during SHUTDOWN mode, depending on the software configuration • The only wake-up source is a low pulse on the RSTN pin The exit from SHUTDOWN is similar to a POR startup. The PDR feature can be enabled or disabled during SHUTDOWN. 1.8 Reset management The BlueNRG-LP offers two different resets: • The PORESETn: this reset is provided by the low power management unit (LPMU) analog block and corresponds to a POR or PDR root cause. It is linked to power voltage ramp-up or ramp-down. This reset impacts all resources of the BlueNRG-LP. The exit from SHUTDOWN mode is equivalent to a POR and thus generates a PORESETn. The PORESETn signal is active when the power supply of the device is below a threshold value or when the regulator does not provide the target voltage. BlueNRG-LP Reset management DS13282 - Rev 2 page 13/72 |
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