BLUENRG-LP datasheet(17/72 Pages) STMICROELECTRONICS

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Priorities among requests from channels of DMA are software programmable (four levels consisting of very

high, high, medium, low) or hardware in case of equality (request 1 has priority over request 2, and so on)

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Independent source and destination transfer size (byte, half word, word), emulating packing and unpacking.

Source/destination addresses must be aligned on the data size

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Support for circular buffer management

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Three event flags (DMA half transfer, DMA transfer complete and DMA transfer error) logically ORed

together in a single interrupt request for each channel

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Memory-to-memory transfer (RAM only)

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Peripheral-to-memory and memory-to-peripheral, and peripheral-to-peripheral transfers

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Access to SRAMs and APB1 peripherals as source and destination

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Programmable number of data to be transferred: up to 65536

1.14

Nested vectored interrupt controller (NVIC)

The interrupts are handled by the Cortex®-M0+ nested vector interrupt controller (NVIC). NVIC controls specific

Cortex®-M0+ interrupts as well as the BlueNRG-LP peripheral interrupts.

The NVIC benefits are the following:

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Nested vectored interrupt controller that is an integral part of the ARM® Cortex®-M0+

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Tightly coupled interrupt controller provides low interrupt latency

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Control system exceptions and peripheral interrupts

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NVIC supports 32 vectored interrupts

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Four programmable interrupt priority levels with hardware priority level masking

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Software interrupt generation using the ARM® exceptions SVCall and PendSV

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Support for NMI

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ARM® Cortex® M0+ vector table offset register VTOR implemented

NVIC hardware block provides flexible interrupt management features with minimal interrupt latency.

1.15

Analog digital converter (ADC)

The BlueNRG-LP embeds a 12-bit ADC. The ADC consists of a 12-bit successive approximation analog-to-digital

converter (SAR) with 2 x 8 multiplexed channels allowing measurements of up to eight external sources and up to

two internal sources.

It embeds a PDM interface integrating a digital filter for processing PDM stream coming from a digital microphone.

It also embeds a dedicated ECM microphone feature with which it is possible to connect an analog microphone

directly to the ADC port of the BlueNRG-LP.

The ADC main features are:

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Conversion frequency is up to 1 Msps

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Three input voltage ranges are supported (0 - 1.2 V, 0 - 2.4 V, 0 - 3.6 V)

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Up to eight analog single-ended channels or four analog differential inputs or a mix of both

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One analog microphone supported through two GPIOs configured in analog mode (an input for the analog

microphone and a Vbias output for the analog microphone)

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Temperature sensor conversion

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Battery level conversion up to 3.6 V

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Continuous or single acquisition

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Digital decimation filter to process a digital audio PDM stream provided by 2 GPIOs and for ADC post-

processing, especially for analog audio stream

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Five modes of conversion are possible:

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ADC continuous or single mode

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Analog continuous audio mode

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Occasional conversions

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Digital continuous audio mode

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Full mode

BlueNRG-LP

Nested vectored interrupt controller (NVIC)

DS13282 - Rev 2

page 17/72

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