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ZSC31015EEG1-R 数据表(PDF) 47 Page - Renesas Technology Corp |
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ZSC31015EEG1-R 数据表(HTML) 47 Page - Renesas Technology Corp |
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47 / 53 page ![]() © 2016 Integrated Device Technology, Inc 47 November 14, 2016 ZSC31015 Datasheet 1 2 3 4 8 7 6 5 Bsink VBP ExtTemp VBN VSS Sig TM VDD Vgate 6 Pin Configuration and Package The standard package of the ZSC31015 is an SOP-8 (3.81 mm / 150 mil body) with a lead-pitch 1.27 mm / 50 mil. Table 6.1 Storage and Soldering Conditions for SOP-8 Package Parameter Symbol Conditions Min Typical Max Units Maximum Storage Temperature Tmax_storage Less than 10hrs, before mounting 150 C Minimum Storage Temperature: Tmin_storage Store in original packing only -50 C Maximum Dry-Bake Temperature Tdrybake Less than100 hrs total, before mounting 125 C Soldering Peak Temperature Tpeak Less than 30s (IPC/JEDEC-STD-020 Standard) 260 C Figure 6.1 ZSC31015 Pin-Out Diagram Table 6.2 ZSC31015 Pin Configuration Pin No. Name Description 1 Bsink Optional ground connection for bridge ground; used for power savings 2 VBP Positive bridge connection 3 ExtTemp External diode connection 4 VBN Negative bridge connection 5 Vgate Gate control for external JFET regulation/over-voltage protection 6 VDD Supply voltage (2.7 to 5.5 V) 7 Sig™ ZACwire™ interface (analog out, digital out, calibration interface) 8 VSS Ground supply |
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