PCF8553DTTSLASHA datasheet(29/51 Pages) NXP

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NXP Semiconductors

PCF8553

40 × 4 LCD segment driver

• R/W = 1 and register address

• read data

• :

• CE set HIGH

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display data

AP[4:0]

R/W default

SCL

SDIO

Data transfers are terminated by de-asserting CE (set CE to logic 1).

Figure 20. SPI-bus read example: reading two data bytes from registers 04h and 05h

10.3 EMC detection

The PCF8553 is ruggedized against EMC susceptibility; however it is not possible to

cover all cases. To detect if a severe EMC event has occurred, it is possible to check the

responsiveness of the device by reading its registers.

11 Internal circuitry

VSS

SCL, SDA, CE

VDD

VSS

RST

VDD

PORE, SDIO, A0,

A1, CLK, IFS

VSS

VLCD

COM0 to

COM3

SEG0 to

SEG39

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Figure 21. Device protection diagram

PCF8553

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 20 April 2021

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