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IMX6SDLCEC 数据表(PDF) 24 Page - NXP Semiconductors

部件名 IMX6SDLCEC
功能描述  i.MX 6Solo/6DualLite Applications Processors for Consumer Products
PDF  169 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

IMX6SDLCEC 数据表(HTML) 24 Page - NXP Semiconductors

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i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018
24
NXP Semiconductors
Electrical Characteristics
4.1.1
Absolute Maximum Ratings
CAUTION
Stresses beyond those listed under Table 6 may cause permanent damage to
the device. These are stress ratings only. Functional operation of the device
at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device
reliability.
Table 6 shows the absolute maximum operating ratings.
Table 6. Absolute Maximum Ratings
Parameter Description
Symbol
Min
Max
Unit
Core supply input voltage (LDO enabled)
VDD_ARM_IN
VDD_SOC_IN
-0.3
1.6
V
Core supply input voltage (LDO bypass)
VDD_ARM_IN
VDD_SOC_IN
-0.3
1.4
V
Core supply output voltage (LDO enabled)
VDD_ARM_CAP
VDD_SOC_CAP
VDD_PU_CAP
-0.3
1.4
V
VDD_HIGH_IN supply voltage (LDO enabled)
VDD_HIGH_IN
-0.3
3.7
V
VDD_HIGH_CAP supply output voltage
VDD_HIGH_CAP
-0.3
2.85
V
DDR I/O supply voltage
NVCC_DRAM
-0.4
1.975 (See note 1)
V
GPIO I/O supply voltage
NVCC_CSI
NVCC_EIM
NVCC_ENET
NVCC_GPIO
NVCC_LCD
NVCC_NAND
NVCC_SD
NVCC_JTAG
-0.5
3.7
V
HDMI and PCIe high PHY VPH supply voltage
HDMI_VPH
PCIE_VPH
-0.3
2.85
V
HDMI and PCIe low PHY VP supply voltage
HDMI_VP
PCIE_VP
-0.3
1.4
V
LVDS and MIPI I/O supply voltage (2.5V supply)
NVCC_LVDS_2P5
NVCC_MIPI
-0.3
2.85
V
PCIe PHY supply voltage
PCIE_VPTX
-0.3
1.4
V
RGMII I/O supply voltage
NVCC_RGMII
-0.5
2.725
V
SNVS IN supply voltage
(Secure Non-Volatile Storage and Real Time Clock)
VDD_SNVS_IN
-0.3
3.4
V
USB I/O supply voltage
USB_H1_DN
USB_H1_DP
USB_OTG_DN
USB_OTG_DP
USB_OTG_CHD_B
-0.3
3.73
V
USB VBUS supply voltage
USB_H1_VBUS
USB_OTG_VBUS
—5.35
V
Vin/Vout input/output voltage range (non-DDR pins)
Vin/Vout
-0.5
OVDD+0.3 (See note 2)
V



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