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IMX6SDLCEC 数据表(PDF) 35 Page - NXP Semiconductors

部件名 IMX6SDLCEC
功能描述  i.MX 6Solo/6DualLite Applications Processors for Consumer Products
PDF  169 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

IMX6SDLCEC 数据表(HTML) 35 Page - NXP Semiconductors

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Electrical Characteristics
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018
NXP Semiconductors
35
their input supply ripple rejection and their on-die trimming. This translates into more stable voltage for
the on-chip logics.
These regulators have three basic modes:
Bypass. The regulation FET is switched fully on passing the external voltage, to the load unaltered.
The analog part of the regulator is powered down in this state, removing any loss other than the IR
drop through the power grid and FET.
Power Gate. The regulation FET is switched fully off limiting the current draw from the supply.
The analog part of the regulator is powered down here limiting the power consumption.
Analog regulation mode. The regulation FET is controlled such that the output voltage of the
regulator equals the programmed target voltage. The target voltage is fully programmable in 25 mV
steps.
For additional information, see the i.MX 6Solo/6DualLite reference manual.
4.3.2
Regulators for Analog Modules
4.3.2.1
LDO_1P1
The LDO_1P1 regulator implements a programmable linear-regulator function from VDD_HIGH_IN (see
Table 8 for minimum and maximum input requirements). Typical Programming Operating Range is 1.0 V
to 1.2 V with the nominal default setting as 1.1 V. The LDO_1P1 supplies the USB Phy, LVDS Phy, HDMI
Phy, MIPI Phy, and PLLs. A programmable brown-out detector is included in the regulator that can be used
by the system to determine when the load capability of the regulator is being exceeded to take the necessary
steps. Current-limiting can be enabled to allow for in-rush current requirements during start-up, if needed.
Active-pull-down can also be enabled for systems requiring this feature.
For information on external capacitor requirements for this regulator, see the Hardware Development
Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors
(IMX6DQ6SDLHDG).
For additional information, see the i.MX 6Solo/6DualLite reference manual (IMX6SDLRM).
4.3.2.2
LDO_2P5
The LDO_2P5 module implements a programmable linear-regulator function from VDD_HIGH_IN (see
Table 8 for minimum and maximum input requirements). Typical Programming Operating Range is
2.25 V to 2.75 V with the nominal default setting as 2.5 V. LDO_2P5 supplies the USB Phy, LVDS Phy,
HDMI Phy, MIPI Phy, E-fuse module, and PLLs. A programmable brown-out detector is included in the
regulator that can be used by the system to determine when the load capability of the regulator is being
exceeded, to take the necessary steps. Current-limiting can be enabled to allow for in-rush current
requirements during start-up, if needed. Active-pull-down can also be enabled for systems requiring this
feature. An alternate self-biased low-precision weak-regulator is included that can be enabled for
applications needing to keep the output voltage alive during low-power modes where the main regulator
driver and its associated global bandgap reference module are disabled. The output of the weak-regulator



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