ADUCM3029BCPZ-R7 datasheet(26/39 Pages) AD

26 / 39 page

ADuCM3027/ADuCM3029

Data Sheet

Rev. B | Page 26 of 39

True Random Number Generator (TRNG)

The TRNG is used during operations where nondeterministic

values are required. These operations can include generating

challenges for secure communication or keys for an encrypted

communication channel. The generator can run multiple times

to generate a sufficient number of bits for the strength of the

intended operation. The TRNG can seed a deterministic

random bit generator.

Reliability and Robustness Features

The ADuCM3027/ADuCM3029 MCUs provide a number of

features that can enhance or help achieve certain levels of

system safety and reliability. While the level of safety is mainly

dominated by system considerations, the following features are

provided to enhance robustness.

ECC Enabled Flash Memory

The entire flash array can be protected to either correct single-

bit errors or detect two-bit errors per 64-bit flash data.

Multiparity Bit Protected SRAM

Each word of the SRAM and cache memory is protected by

multiple parity bits to allow detection of random soft errors.

Software Watchdog

The on-chip watchdog timer can provide software-based

supervision of the ADuCM3027/ADuCM3029.

Cyclic Redundancy Check (CRC) Accelerator

The CRC accelerator computes the CRC for a block of memory

locations. The exact memory location can be in the SRAM,

flash, or any combination of MMRs. The CRC accelerator

generates a checksum that can be compared with an expected

signature.

The main features of the CRC include the following:



Generates a CRC signature for a block of data.



Supports programmable polynomial length of up to 32 bits.



Operates on 32 bits of data at a time.



Supports MSB first and LSB first CRC implementations.



Various data mirroring capabilities.



Initial seed to be programmed by user.



DMA controller (memory to memory transfer) used for

data transfer to offload the MCU.

Programmable GPIOs

The ADuCM3027 and ADuCM3029 MCUs have 44 and 34

GPIO pins in the LFCSP and WLCSP packages, respectively.

Note that the ADuCM3029-1 and ADuCM3029-2 models have

44 GPIO pins and are available in the LFCSP only. These GPIO

pins have multiple, configurable functions defined by user code.

They can be configured as an input/output and have

programmable pull-up resistors. All GPIO pins are functional

over the full supply range.

In deep sleep mode, the GPIO pins retain their state. On reset,

the GPIO pins tristate.

Timers

The ADuCM3027/ADuCM3029 MCUs have three general-

purpose timers and a watchdog timer.

General-Purpose Timers

The ADuCM3027/ADuCM3029 MCUs have three identical

general-purpose timers, each with a 16-bit up and down

counter. The up and down counter can be clocked from one of

four user selectable clock sources. Any selected clock source

can be scaled down using a prescaler of 1, 16, 64, or 256.

Watchdog Timer (WDT)

The WDT is a 16-bit count down timer with a programmable

prescaler. The prescaler source is selectable and can be scaled by

a factor of 1, 16, or 256. The WDT is clocked by the 32 kHz on-

chip oscillator (LFOSC) and recovers from an illegal software

state. The WDT requires periodic servicing to prevent it from

forcing a reset or interrupt to the MCU.

Analog-to-Digital Converter (ADC) Subsystem

The ADuCM3027/ADuCM3029 MCUs integrate a 12-bit SAR

ADC with up to eight external channels. Conversions can be

performed in single or autocycle mode. In single mode, the

ADC can be configured to convert on a particular channel by

selecting one of the channels. Autocycle mode is provided to

reduce MCU overhead of sampling and reading individual

channel registers. The ADC can also be used for temperature

sensing and measuring battery voltage using dedicated

channels. Temperature sensing and battery monitoring cannot

be included with external channels in autocycle mode.

A digital comparator triggers an interrupt if ADC input is above

or below a programmable threshold. The ADC0_VIN0,

ADC0_VIN1, ADC0_VIN2, and ADC0_VIN3 input channels

can be used with the digital comparator.

Use the ADC in DMA mode to reduce MCU overhead by

moving ADC results directly into SRAM with a single interrupt

asserted when the required number of ADC conversions has

been completely logged to memory.

ADUCM3029BCPZ-R7 数据表(PDF) 26 Page - Analog Devices

ADUCM3029BCPZ-R7 数据表(HTML) 26 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

数据表下载