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ST25R3911B 数据表(PDF) 18 Page - STMicroelectronics |
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ST25R3911B 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 116 page  Pins Recommended capacitors VSP_A-VSN_A 2.2 μF, in parallel with 10 nF VSP_D-VSN_D 2.2 μF, in parallel with 10 nF VSP_RF-VSN_RF 2.2 μF, in parallel with 10 nF Regulators have two basic operation modes depending on supply voltage, 3.3 V supply mode (max 3.6 V) and 5 V supply mode (max 5.5 V). The supply mode is set by writing bit sup3 V in the IO configuration register 2. Default setting is 5 V, hence this bit has to be set to 1 after power-up in case of 3.3 V supply. In 3.3 V mode all regulators are set to the same regulated voltage in range from 2.4 V to 3.4 V, while in 5 V only the VSP_RF can be set in range from 3.9 V to 5.1 V, while VSP_A and VSP_D are fixed to 3.4 V. The regulators are operating when signal en is high (en is configuration bit in Operation control register. When signal en is low the ST25R3911B is in low power Power-down mode. In this mode consumption of the power supply system is also minimized. VSP_RF regulator The intention of this regulator is to improve PSRR of the transmitter (the noise of the transmitter power supply is emitted and fed back to the receiver). The VSP_RF regulator operation is controlled and observed by writing and reading two regulator registers: • Regulator voltage control register controls the regulator mode and regulated voltage. Bit reg_s controls regulator mode. In case it is set to 0 (default state) the regulated voltage is set using direct command Adjust Regulators. When bit reg_s is asserted to 1 regulated voltage is defined by bits rege_3 to rege_1 of the same register. The regulated voltage adjustment range depends on the power supply mode. In case of 5 V supply mode the adjustment range is between 3.9 V and 5.1 V in steps of 120 mV, in case of 3.3 V supply mode the adjustment range is from 2.4 V to 3.4 V with steps of 100 mV. Default regulated voltage is the maximum one (5.1 V and 3.4 V in case of 5 V and 3.3 V supply mode respectively). • Regulator and Timer Display register is a read only register that displays actual regulated voltage when regulator is operating. It is especially useful in case of automatic mode, since the actual regulated voltage, which is the result of direct command Adjust Regulators, can be observed. The VSP_RF regulator also includes a current limiter that limits the regulator typically to current of 200 mArms in normal operation (500 mA in case of short). In case the transmitter output current higher the 200 mArms is required, VSP_RF regulator cannot be used to supply the transmitter, VSP_RF has to be externally connected to VDD (connection of VSP_RF to supply voltage higher than VDD is not allowed). The voltage drop of the transmitter current is the main source of the ST25R3911B power dissipation. This voltage drop is composed of drop in the transmitter driver and in the drop on VSP_RF regulator. Due to this it is recommended to set regulated voltage using direct command Adjust Regulators. It results in good power supply rejection ration with relatively low dissipated power due to regulator voltage drop. In power ‑down mode the VSP_RF regulator is not operating. VSP_RF pin is connected to VDD through 1 kΩ resistor. Connection through resistors ensures smooth power-up of the system and a smooth transition from power ‑down mode to other operating modes. VSP_A and VSP_D regulators VSP_A and VSP_D regulators are used to supply the ST25R3911B analog and digital blocks, respectively. In 3.3 V mode, VSP_A and VSP_D regulator are set to the same regulated voltage as the VSP_RF regulator, in 5 V mode VSP_A and VSP_D regulated voltage is fixed to 3.4 V. The use of VSP_A and VSP_D regulators is obligatory in 5 V mode since analog and digital blocks supplied with these two pins contain low voltage transistors that support maximum supply voltage of 3.6 V. In 3.3 V supply mode the use of regulators is strongly recommended in order to improve PSRR of analog processing. For low cost applications it is possible to disable the VSP_D regulator and to supply digital blocks through external short between VSP_A and VSP_D (configuration bit vspd_off in the I/O Configuration register 2. In case VSP_D regulator is disabled VSP_D can alternatively be supplied from VDD (in 3.3 V mode only) in case VSP_A is not more than 300 mV lower than VDD. ST25R3911B Application information DS11793 - Rev 6 page 18/116 |
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