ST25R3911B datasheet(35/116 Pages) STMICROELECTRONICS

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Direct command chaining is not possible.

IRQ due to termination of direct command is produced after command execution is terminated.

1.2.14

Start timers

See Section 1.2.7 Timers.

1.2.15

Test access

The ST25R3911B does not contain any dedicated test pins. A direct command Test Access is used to enable RW

access of test registers and entry in different test modes. Pins CSI and CSO are used as test pins.

Test mode entry and access to test registers

Test registers are not part of normal SPI register address space. After sending a direct command Test Access,

test registers can be accessed using normal Read/Write register SPI command. Access to test registers is

possible in a chained command sequence where first command Test Access is sent, followed by read/write

access to test registers using auto increment feature. After SPI interface reset (SS toggle) the content of test

registers is kept.

Test register are set to default state at power-up and by sending the command Clear Test Registers.

Table 12. Analog Test and Observation Register

Test Address 01h: Analog Test and Observation Register - Type: RW

Bit

Name

Default

Function

Comments

tana_7

Reserved

tana_6

Reserved

tana_5

Reserved

Not used

tana_3

See Table 13

These test modes are also intended for observation in normal mode.

Other modes of this register are also available when analog test mode is not set.

tana_2

tana_1

tana_0

ST25R3911B

Application information

DS11793 - Rev 6

page 35/116

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