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AD9986 数据表(PDF) 13 Page - Analog Devices |
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AD9986 数据表(HTML) 13 Page - Analog Devices |
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13 / 37 page  Data Sheet AD9986 SPECIFICATIONS analog.com Rev. 0 | 13 of 37 Table 15. Parameter Test Conditions/Comments Min Typ Max Unit SINGLE SIDEBAND PHASE NOISE OFFSET (PLL DISABLED) Direct device clock input at 6 dBm fOUT = 3.6 GHz, fDAC = 12 GSPS, CLKINx Frequency (fCLKIN) = 12 GHz Rohde & Schwarz SMA100B B711 option 1 kHz −118 dBc/Hz 10 kHz −129 dBc/Hz 100 kHz −137 dBc/Hz 600 kHz −144 dBc/Hz 1.2 MHz −148 dBc/Hz 1.8 MHz −149 dBc/Hz 6 MHz −153 dBc/Hz SINGLE SIDEBAND PHASE NOISE OFFSET (PLL ENABLED) Loop filter component values include C1 = 22 nF, R1 = 226 Ω, C2 = 2.2 nF, C3 = 33 nF, and phase detector frequency (PFD) = 500 MHz fOUT = 1.8 GHz, fDAC = 12 GSPS, fCLKIN = 0.5 GHz 1 kHz −106 dBc/Hz 10 kHz −113 dBc/Hz 100 kHz −120 dBc/Hz 600 kHz −127 dBc/Hz 1.2 MHz −134 dBc/Hz 1.8 MHz −138 dBc/Hz 6 MHz −150 dBc/Hz ADC AC SPECIFICATIONS Nominal supplies with TA = 25°C. Input amplitude (AIN) = −1 dBFS, full bandwidth mode (all digital downconverters bypassed). For the minimum and maximum values, TJ = −40°C to +120°C. Specifications represent average of four ADC channels with DACs powered on. See the AN-835 Application Note for definitions and for details on how these tests were completed. Table 16. Parameter Min Typ Max Unit NOISE DENSITY1 −153 dBFS/Hz NOISE FIGURE2 25.3 dB SIGNAL-TO-NOISE RATIO (SNR) fIN = 450 MHz 56.9 dBFS fIN = 900 MHz 56.7 dBFS fIN = 1800 MHz 54.9 dBFS fIN = 2700 MHz 49.6 52.7 dBFS fIN = 3600 MHz 52.1 dBFS fIN = 4500 MHz 50.7 dBFS fIN = 5400 MHz 50.8 dBFS fIN = 6300 MHz 49.7 dBFS fIN = 7200 MHz 48.8 dBFS SIGNAL-TO-NOISE-AND-DISTORTION (SINAD) fIN = 450 MHz 56.9 dBFS fIN = 900 MHz 56.5 dBFS fIN = 1800 MHz 54.5 dBFS fIN = 2700 MHz 49.5 52.5 dBFS fIN = 3600 MHz 51.2 dBFS fIN = 4500 MHz 50.2 dBFS fIN = 5400 MHz 49.0 dBFS fIN = 6300 MHz 48.0 dBFS |
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