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ADIN1100BCPZ-R7 数据表(PDF) 3 Page - Analog Devices |
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ADIN1100BCPZ-R7 数据表(HTML) 3 Page - Analog Devices |
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3 / 78 page  Data Sheet ADIN1100 TABLE OF CONTENTS analog.com Rev. 0 | 3 of 78 BASE-T1 Autonegotiation Link Partner Base Page Ability Register, Bits[47:32] .................. 55 BASE-T1 Autonegotiation Next Page Transmit Register, Bits[15:0].......................... 56 BASE-T1 Autonegotiation Next Page Transmit Register, Bits[31:16]........................ 56 BASE-T1 Autonegotiation Next Page Transmit Register, Bits[47:32]........................ 56 BASE-T1 Autonegotiation Link Partner Next Page Ability Register, Bits[15:0]..................... 56 BASE-T1 Autonegotiation Link Partner Next Page Ability Register, Bits[31:16]................... 57 BASE-T1 Autonegotiation Link Partner Next Page Ability Register, Bits[47:32] .................. 57 10BASE-T1 Autonegotiation Control Register.......................................................... 57 10BASE-T1 Autonegotiation Status Register...58 Autonegotiation Forced Mode Enable Register.......................................................... 58 Extra Autonegotiation Status Register............. 58 PHY Instantaneous Status Register.................59 Vendor Specific 1 MMD Identifier High Register.......................................................... 59 Vendor Specific 1 MMD Identifier Low Register.......................................................... 60 Vendor Specific 1 MMDs in Package Register.......................................................... 60 Vendor Specific 1 MMD Status Register.......... 60 System Interrupt Status Register..................... 60 System Interrupt Mask Register....................... 61 Software Reset Register.................................. 61 Software Power-Down Control Register...........61 PHY Subsystem Reset Register...................... 61 PHY MAC Interface Reset Register................. 62 System Status Register....................................62 CRSM Power Management Control Register...62 MAC Interface Configuration Register..............62 CRSM Diagnostics Clock Control Register...... 63 Package Configuration Values Register...........63 MDIO Control Register..................................... 63 Pin Mux Configuration 1 Register.....................63 Pin Mux Configuration 2 Register.....................63 LED_0 On/Off Blink Time Register...................64 LED_1 On/Off Blink Time Register...................65 LED Control Register....................................... 65 LED Polarity Register....................................... 67 Vendor Specific MMD 2 Device Identifier High Register..................................................68 Vendor Specific MMD 2 Device Identifier Low Register.................................................. 68 Vendor Specific 2 MMDs in Package Register.......................................................... 68 Vendor Specific MMD 2 Status Register.......... 68 PHY Subsystem Interrupt Status Register....... 69 PHY Subsystem Interrupt Mask Register.........69 Frame Checker Enable Register...................... 69 Frame Checker Interrupt Enable Register........70 Frame Checker Transmit Select Register........ 70 Receive Error Count Register.......................... 70 Frame Checker Count High Register............... 70 Frame Checker Count Low Register................ 71 Frame Checker Length Error Count Register...71 Frame Checker Alignment Error Count Register.......................................................... 71 Frame Checker Symbol Error Count Register..71 Frame Checker Oversized Frame Count Register.......................................................... 71 Frame Checker Undersized Frame Count Register.......................................................... 72 Frame Checker Odd Nibble Frame Count Register.......................................................... 72 Frame Checker Odd Preamble Packet Count Register............................................... 72 Frame Checker False Carrier Count Register..72 Frame Generator Enable Register................... 73 Frame Generator Control/Restart Register...... 73 Frame Generator Continuous Mode Enable Register.......................................................... 73 Frame Generator Interrupt Enable Register.....73 Frame Generator Frame Length Register........ 74 Frame Generator Interframe Gap Length Register.......................................................... 74 Frame Generator Number of Frames High Register.......................................................... 74 Frame Generator Number of Frames Low Register.......................................................... 74 Frame Generator Done Register......................75 RMII Configuration Register............................. 75 MAC Interface Loopbacks Configuration Register.......................................................... 75 MAC Start of Packet (SOP) Generation Control Register............................................. 75 PCB Layout Recommendations.......................... 77 Land Pattern.....................................................77 Component Placement and Routing................ 77 Crystal Placement and Routing........................77 PCB Stack........................................................77 |
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