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ADIN1100BCPZ-R7 数据表(PDF) 63 Page - Analog Devices |
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ADIN1100BCPZ-R7 数据表(HTML) 63 Page - Analog Devices |
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63 / 78 page  Data Sheet ADIN1100 ETHERNET CLAUSE 45 REGISTER DETAILS analog.com Rev. 0 | 63 of 78 CRSM DIAGNOSTICS CLOCK CONTROL REGISTER Device Address: 0x1E; Register Address: 0x882C, Reset: 0x0002, Name: CRSM_DIAG_CLK_CTRL CRSM diagnostics clock control. Table 98. Bit Descriptions for CRSM_DIAG_CLK_CTRL Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x1 R 0 CRSM_DIAG_CLK_EN Enable the Diagnostics Clock. 0x0 R/W PACKAGE CONFIGURATION VALUES REGISTER Device Address: 0x1E; Register Address: 0x8C22, Reset: 0x0002, Name: MGMT_PRT_PKG The MGMT_PRT_PKG_VAL address allows reading of the package configuration values. Table 99. Bit Descriptions for MGMT_PRT_PKG Bits Bit Name Description Reset Access [15:6] RESERVED Reserved. 0x0 R [5:0] MGMT_PRT_PKG_VAL Package Type. 2 = ADIN1100 40-lead LFCSP. 0x2 R MDIO CONTROL REGISTER Device Address: 0x1E; Register Address: 0x8C30, Reset: 0x0000, Name: MGMT_MDIO_CNTRL Table 100. Bit Descriptions for MGMT_MDIO_CNTRL Bits Bit Name Description Reset Access [15:1] RESERVED Reserved. 0x0 R 0 MGMT_GRP_MDIO_EN Enable MDIO PHY/Port Group Address Mode. In this mode, the PHY responds to any write or address operation to the 5-bit PHY/Port Address 31 (decimal) regardless of its own PHY/port address. This feature is only intended for initialization sequences in multiport applications, must only be set in those cases, and cleared immediately after the initialization is complete. 0x0 R/W PIN MUX CONFIGURATION 1 REGISTER Device Address: 0x1E; Register Address: 0x8C56, Reset: 0x00FE, Name: DIGIO_PINMUX Table 101. Bit Descriptions for DIGIO_PINMUX Bits Bit Name Description Reset Access [15:4] RESERVED Reserved. 0xF R [3:1] DIGIO_LED1_PINMUX Pin Mux Select for LED_1. 0x7 R/W 000: LED_1. 111: LED_1 output not enabled. 0 DIGIO_LINK_ST_POLARITY LINK_ST Polarity. 0x0 R/W 0: assert high. 1: assert low. PIN MUX CONFIGURATION 2 REGISTER Device Address: 0x1E; Register Address: 0x8C57, Reset: 0x00FF, Name: DIGIO_PINMUX2 Table 102. Bit Descriptions for DIGIO_PINMUX2 Bits Bit Name Description Reset Access [15:8] RESERVED Reserved. 0x0 R |
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