ADMV8913-EP

Enhanced Product

Rev. 0 | Page 4 of 23

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SUPPLY CURRENT (DYNAMIC)

VDD2

mA

frequency in MHz. For example, the continuous serial

peripheral interface (SPI) writing at 10 MHz yields

2.8 mA of dynamic supply current.

LOGIC (RST, CS, SCLK, SDI, SDO, SFL, HPF_Bx,

and LPF_Bx)

Logic Low

–0.3

0

+0.8

V

Logic High

1.2

3.3

3.6

V

TIMING SPECIFICATIONS

Table 2.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

10

ns

RST low time to perform reset

10

ns

SCLK cycle time (write)

20

ns

SCLK cycle time (read)

2.5

ns

SCLK high time

2.5

ns

SCLK low time

5

ns

CS falling edge to SCLK rising edge setup time

2

ns

SCLK rising edge to CS hold time

5

ns

Minimum CS high time for latching in data (for multiple SPI transactions)

5

ns

CS rising edge to next SCLK rising edge ignore

5

ns

SDI data setup time

2

ns

SDI data hold time

10

ns

SFL falling edge (exiting SFL mode) to CS falling edge time (start SPI transaction)

10

ns

CS rising edge (end SPI transaction) to SFL rising edge time (entering SFL mode)

10

ns

SFL rising edge to CS falling edge time

10

ns

CS cycle time (SFL mode)

2.5

ns

CS high time (SFL mode)

2.5

ns

CS low time (SFL mode)

6

ns

5

ns

4

ns