ADR4520ARZ-R7 datasheet(36/40 Pages) AD

36 / 40 page

ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550

Data Sheet

Rev. D | Page 36 of 40

THERMAL HYSTERESIS

In addition to stability over time, as described in the Long-

Term Drift section, it is useful to know the thermal hysteresis,

that is, the stability vs. cycling of temperature. Thermal

hysteresis is an important parameter because it tells the system

designer how closely the signal returns to its starting amplitude

after the ambient temperature changes and the subsequent

return to room temperature. Figure 113 shows the change in

output voltage as the temperature cycles three times from room

temperature to +125°C to −40°C and back to room temperature.

In the three full cycles, the output hysteresis is typically −13 ppm.

The histogram in Figure 114 shows that the hysteresis is larger

when the device is cycled through only a half cycle, from room

temperature to 125°C and back to room temperature, typically

−97 ppm.

–40

–20

100

120

TEMPERATURE (°C)

CYCLE 1

CYCLE 2

CYCLE 3

–250

–200

–150

–100

–50

100

150

200

250

Figure 113. Change in Output Voltage over Three Full Temperature Cycles

(−40°C to +125°C)

–200

–160

–120

–80

–40

80 100

OUTPUT VOLTAGE HYSTERESIS (ppm)

27 UNITS × 3 CYCLES

HALF CYCLE = +26°C, +125°C, +26°C

FULL CYCLE = +26°C, +125°C, +26°C, –40°C, +26°C

HALF CYCLE

FULL CYCLE

Figure 114. Histogram Showing the Temperature Hysteresis of the Output

Voltage (−40°C to +125°C)

Figure 115 shows the change in input offset voltage as the

temperature cycles three times from room temperature to

+70°C to 0°C and back to room temperature. In the three full

cycles, the output hysteresis is typically −8 ppm. The histogram

in Figure 116 shows that the hysteresis is larger when the device

is cycled through only a half cycle, from room temperature to

+70°C and back to room temperature, typically −17 ppm.

TEMPERATURE (°C)

CYCLE 1

CYCLE 2

CYCLE 3

Figure 115. Change in Output Voltage over Three Full Temperature Cycles

(0°C to 70°C)

–80 –70 –60 –50 –40 –30 –20 –10 0

10 20 30 40 50 60 70 80

OUTPUT VOLTAGE HYSTERESIS (ppm)

27 UNITS × 3 CYCLES

HALF CYCLE = 25°C, 70°C, 25°C

FULL CYCLE = 25°C, 70°C, 25°C, 0°C, 25°C

HALF CYCLE

FULL CYCLE

Figure 116. Histogram Showing the Temperature Hysteresis of the Output

Voltage (0°C to 70°C)

TEMPERATURE (°C)

CYCLE 1

CYCLE 2

CYCLE 3

CYCLE 4

Figure 117. D Grade Change in Output Voltage over Three Full Temperature

Cycles (0°C to 70°C)

ADR4520ARZ-R7 数据表(PDF) 36 Page - Analog Devices

ADR4520ARZ-R7 数据表(HTML) 36 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

数据表下载

链接网址

ADR4520ARZ-R7 数据表(PDF) 36 Page - Analog Devices

ADR4520ARZ-R7 数据表(HTML) 36 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

数据表 下载

链接网址

数据表下载