LT8685SRVPBF datasheet(14/24 Pages) AD

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LT8685S

Rev. 0

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OPERATION

0° for CH1, 180° for CH2, 270° for CH3 and 90° for CH4.

Multiphase operation reduces input current ripple ampli-

tude while increasing the ripple frequency resulting in

lower required input capacitance. When combining chan-

nels, the master channel phase determines the combined

channel’s clock phase.

MODE SELECTION AND SYNCHRONIZATION

The LT8685S offers two primary operating modes, Burst

Mode and Pulse Skipping Mode, plus the option to select

frequency spread-spectrum for each. In pulse skipping

mode, all switching cycles remain aligned to the internal

clock. Further, full switching frequency is maintained to

lower load currents than Burst Mode. Conversely, Burst

Mode reduces input current at low load currents, thereby

achieving higher low load efficiency than Pulse Skipping

Mode. Selecting spread-spectrum results in frequency

modulation of the programmed clock frequency to reduce

EMI/EMC emissions. When selected, the clock frequency

will vary between the programmed frequency and the pro-

grammed frequency plus approximately 20%.

The SYNC/MODE pin is used to select the desired operat-

ing mode. To select low ripple, high efficiency Burst Mode,

connect the SYNC/Mode pin to ground. Alternatively, con-

nect a 26k (5% tolerance or better) resistor to enable low

ripple high efficiency Burst Mode operation with spread

spectrum. To select pulse skipping mode, float the SYNC/

MODE pin, or to enable pulse skipping with spread spec-

trum connect the SYNC/MODE pin to INTVCC.

Finally, the LT8685S may be synchronized to an external

clock source by driving the SYNC/MODE pin with a clock

signal that has a minimum high voltage of 1.5V and max-

imum low voltage of 0.4V. The minimum required pulse

width is 100ns for a high pulse and 100ns for a low pulse.

When syncing, the RT resistor should be chosen to set the

LT8685S switching frequency close to the synchroniza-

tion frequency. The LT8685S will operate in pulse-skip-

ping mode while synchronized to an external clock.

INTVCC REGULATOR

The INTVCC regulator supplies internal LT8685S circuitry.

The current draw will depend on the operating frequency,

the higher the switching frequency, the greater the current

drawn from INTVCC. The regulator is supplied by VIN1 at

start-up, but it will draw its supply current from BIAS if the

BIAS voltage is above 4.5V and VIN1 is greater than VBIAS

+ 1V. If the BIAS pin is connected to a switching regulator

channel it will improve efficiency, reduce on-chip power

dissipation and lower the required current. The INTVCC

regulator may be used to configure other input pins and

output pull-ups related to the LT8685S. It should not be

used to connect to any components not related to the

LT8685S to avoid unexpected interactions.

APPLICATIONS INFORMATION

The LT8685S combines four buck converters to provide a

flexible system supply that can be configured to generate

two to four regulated outputs while occupying minimal

board space.

PRECISION UNDERVOLTAGE LOCKOUT

The accurate 0.8V threshold (falling) of the EN/UVLO pin

enables a programmable LT8685S undervoltage lockout

feature realized by connecting an external resistor divider

between the VIN1 input supply pin and the EN/UVLO pin.

An EN/UVLO logic low input turns off all channels regard-

less of the state of EN2, EN3, and EN4 pins.

The LT8685S UVLO divider circuit is shown in Figure 1.

The UVLO threshold is given by:

V(LT8685S_UVLO) =

RUV1+RUV2

RUV2

• 0.8V

Figure 1. LT8685S UVLO Resistor Divider Connection

RUV2

RUV1

EN/UVLO

VIN1

LT8685S

8685S F01

LT8685SRVPBF 数据表(PDF) 14 Page - Analog Devices

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