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L6711

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DEVICE DESCRIPTION

The device is a three phase PWM controller with embedded high current drivers that provides complete

control logic and protections for a high performance step-down DC-DC voltage regulator optimized for ad-

vanced microprocessor power supply. Multi phase buck is the simplest and most cost-effective topology

employable to satisfy the increasing current demand of newer microprocessors and modern high current

DC/DC converters and POLs. It allows distributing equally load and power between the phases using

smaller, cheaper and most common external power mosfets and inductors. Moreover, thanks to the 120°

of phase shift between each phase, the input and output capacitor count results in being reduced. Phase

interleaving causes in fact input rms current and output ripple voltage reduction and show an effective out-

put switching frequency increase: the 150kHz free-running frequency per phase, externally adjustable

through a resistor, results tripled on the output.

The controller includes multiple DACs, selectable through an apposite pin (VID_SEL), allowing compati-

bility with both VRD 10.x and Hammer specifications, also performing D-VID transitions accordingly. The

output voltage can be precisely selected, programming the VID and VID_SEL pins, from 0.8185V to

1.5810V with 12.5mV binary steps (VRD 10.x compliant mode - 6 BIT with -19mV offset already pro-

grammed during production) or from 0.800V to 1.550V with 25mV steps (VRM Hammer compliant mode

- 5 BIT, VID5 programs a 25mV positive offset in this case), with a maximum tolerance on the output reg-

ulated voltage of ±0.5% (±0.6% for Hammer) over temperature and line voltage variations.

The device permits easy and flexible system design by allowing current reading across either inductor or

low side mosfet in fully differential mode simply selecting the desired way through the CS_SEL pin. In both

cases, also a sense resistor in series to the related element can be considered to improve reading preci-

sion. The current information read corrects the PWM output in order to equalize the average current car-

ried by each phase limiting the error at ±3% over static and dynamic conditions unless considering the

sensing element spread.

The device provides a programmable Over-Voltage protection to protect the load from dangerous over

stress and can be externally set to a fixed voltage through an apposite resistor or it can be set internally

with a fixed percentage, latching immediately by turning ON the lower driver and driving high the FAULT

pin. Furthermore, preliminary OVP protection also allows the device to protect load from dangerous OVP

when VCC is not above the UVLO threshold.

Over-Current protection provided, with an OC threshold for each phase, causes the device to enter in con-

stant current mode until the latched UVP. Depending on the reading mode selected, the device keeps con-

stant the peak (inductor sensing) or the valley (LS sensing) of the inductor current ripple.

The device drives high the FAULT pin after each latching event: to recover it is enough to cycle VCC or

the OUTEN pin.

A compact 7x7mm body TQFP48 package with exposed thermal pad allows dissipating the power to drive

the external mosfet through the system board.

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CURRENT READING AND CURRENT SHARING CONTROL LOOP

The device embeds a flexible, fully-differential current sense circuitry that is able to read across both low

side or inductor parasitic resistance or across a sense resistor placed in series to that element. The fully-

differential current reading rejects noise and allows placing sensing element in different locations without

affecting the measurement's accuracy. The kind of sense element can be simply chosen through the

CS_SEL pin: setting this pin free, the LS mosfet is used while shorting it to SGND, the inductor will be used

instead. Details about connections are shown in Figure 6.

The high bandwidth current sharing control loop allows current balance even during load transients: a cur-

read current and this reference is converted to a voltage that with a proper gain is used to adjust the duty

cycle whose dominant value is set by the voltage error amplifier.