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Overcoming the OC threshold during the dynamic VID causes the device to enter the constant current lim-

itation slowing down the output voltage dV/dt also causing the failure in the D-VID test.

The way in which the device modifies the reference depends on the VID_SEL status and then on the kind

of DAC selected.

9.1

VID_SEL = OPEN (see Figure 14).

Selecting the VRD10.x DAC, the device checks for VID code modifications on the rising edge of a clock

that is three times the switching frequency of each phase and waits for a confirmation on the following

falling edge. Once the new code is stable, on the next rising edge, the reference starts stepping up or down

transition, VID code changes are ignored; the device re-starts monitoring VID after the transition has fin-

ished on the next rising edge available.

9.1.1 Warning:

if the new VID code is more than 1 LSB higher than the previous, the device will execute the transition

is recommended to carefully control the VID change rate in order to carefully control the slope of the output

voltage variation.

Figure 14. Dynamic VID Transition, VRD10.x DAC

Tsw/3

x 4 Step VID Transition

VRD10.x DAC

t

t

t

VID [0,5]

Int. Reference

Vout

Tsw

4 x 1 Step VID Transition - VRD10.x DAC

t

VID Clock