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AM6412...ALV 数据表(PDF) 38 Page - Texas Instruments

部件名 AM6412...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6412...ALV 数据表(HTML) 38 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
T5
PRG0_PRU0_GPO15
PADCONFIG:
PADCONFIG103
0x000F419C
PRG0_PRU0_GPO15
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI15
1
I
0
PRG0_RGMII1_TX_CTL
2
O
PRG0_PWM0_B1
3
IO
1
SPI3_CS1
6
IO
1
GPIO1_15
7
IO
pad
GPMC0_A16
9
OZ
U4
PRG0_PRU0_GPO16
PADCONFIG:
PADCONFIG104
0x000F41A0
PRG0_PRU0_GPO16
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI16
1
I
0
PRG0_RGMII1_TXC
2
IO
0
PRG0_PWM0_A2
3
IO
0
SPI3_CLK
6
IO
0
GPIO1_16
7
IO
pad
GPMC0_A4
9
OZ
U1
PRG0_PRU0_GPO17
PADCONFIG:
PADCONFIG105
0x000F41A4
PRG0_PRU0_GPO17
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI17
1
I
0
PRG0_IEP0_EDC_SYNC_OUT1
2
O
PRG0_PWM0_B2
3
IO
1
CPTS0_TS_SYNC
4
O
CP_GEMAC_CPTS0_TS_SYNC
5
O
SPI3_CS0
6
IO
1
GPIO1_17
7
IO
pad
TIMER_IO11
8
IO
0
GPMC0_A17
9
OZ
V1
PRG0_PRU0_GPO18
PADCONFIG:
PADCONFIG106
0x000F41A8
PRG0_PRU0_GPO18
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI18
1
I
0
PRG0_IEP0_EDC_LATCH_IN0
2
I
0
PRG0_PWM0_TZ_IN
3
I
0
CPTS0_HW1TSPUSH
4
I
0
CP_GEMAC_CPTS0_HW1TSPUSH
5
I
0
EHRPWM8_A
6
IO
0
GPIO1_18
7
IO
pad
UART4_CTSn
8
I
1
GPMC0_A5
9
OZ
UART2_RXD
10
I
1
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
www.ti.com
38
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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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