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AM6412...ALV 数据表(PDF) 40 Page - Texas Instruments

部件名 AM6412...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6412...ALV 数据表(HTML) 40 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
W3
PRG0_PRU1_GPO4
PADCONFIG:
PADCONFIG112
0x000F41C0
PRG0_PRU1_GPO4
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU1_GPI4
1
I
0
PRG0_RGMII2_RX_CTL
2
I
0
PRG0_PWM2_B2
3
IO
1
GPIO1_24
7
IO
pad
EQEP1_B
8
I
0
UART6_TXD
10
O
P4
PRG0_PRU1_GPO5
PADCONFIG:
PADCONFIG113
0x000F41C4
PRG0_PRU1_GPO5
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU1_GPI5
1
I
0
GPIO1_25
7
IO
pad
EQEP1_S
8
IO
0
UART6_RTSn
10
O
R5
PRG0_PRU1_GPO6
PADCONFIG:
PADCONFIG114
0x000F41C8
PRG0_PRU1_GPO6
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU1_GPI6
1
I
0
PRG0_RGMII2_RXC
2
I
0
GPIO1_26
7
IO
pad
EQEP2_A
8
I
0
GPMC0_A19
9
OZ
UART4_CTSn
10
I
1
W5
PRG0_PRU1_GPO7
PADCONFIG:
PADCONFIG115
0x000F41CC
PRG0_PRU1_GPO7
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU1_GPI7
1
I
0
PRG0_IEP1_EDC_LATCH_IN1
2
I
0
RGMII1_RD0
4
I
0
RMII1_RXD0
5
I
0
GPIO1_27
7
IO
pad
EQEP2_B
8
I
0
UART4_TXD
10
O
R1
PRG0_PRU1_GPO8
PADCONFIG:
PADCONFIG116
0x000F41D0
PRG0_PRU1_GPO8
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU1_GPI8
1
I
0
PRG0_PWM2_TZ_OUT
3
O
GPIO1_28
7
IO
pad
EQEP2_S
8
IO
0
UART4_RTSn
10
O
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
www.ti.com
40
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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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