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AM6412...ALV 数据表(PDF) 99 Page - Texas Instruments

部件名 AM6412...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6412...ALV 数据表(HTML) 99 Page - Texas Instruments

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over operating junction temperature range (unless otherwise noted)
(1)(2)
PARAMETER
MIN
MAX UNIT
Steady-state max voltage at all other IO pins(4)
USB0_VBUS(5)
-0.3
3.6
V
USB0_ID(6)
-0.3
3.6
All other IO pins
-0.3
IO supply
voltage + 0.3
V
Transient overshoot and undershoot at IO pin
20% of IO supply voltage for up to 20%
of the signal period (see Figure 7-1, IO
Transient Voltage Ranges)
0.2 × VDD(7)
V
Latch-up performance
TBD
TBD
mA
TSTG
Storage temperature
-55
+150
°C
(1)
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Section 7.4, Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be
fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2)
All voltage values are with respect to VSS, unless otherwise noted.
(3)
The VMON_VSYS pin provides a way to monitor the system power supply. For more information, see Section 9.3.4, System Power
Supply Monitor Design Guidelines.
(4)
This parameter applies to all IO pins which are not fail-safe and the requirement applies to all values of IO supply voltage. For
example, if the voltage applied to a specific IO supply is 0 volts the valid input voltage range for any IO powered by that supply will be
–0.3 to +0.3 volts. Special attention should be applied anytime peripheral devices are not powered from the same power sources used
to power the respective IO supply. It is important the attached peripheral never sources a voltage outside the valid input voltage range,
including power supply ramp-up and ramp-down sequences.
(5)
An external resistor divider is required to limit the voltage applied to this device pin. For more information, see Section 9.3.3, USB
Design Guidelines.
(6)
The USB0_ID pin is connected to analog circuits in the USB0 PHY. The analog circuits source a known current while measuring
voltage, to determine the resistance value (RID), if connected to VSS through a resistor. This pin should be connected to VSS for USB
host operation, or left unconnected for USB peripheral operation, and should never be connected to any external voltage source.
(7)
VDD is the voltage on the corresponding power-supply pin(s) for the IO.
Fail-safe IO terminals are designed such they do not have dependencies on the respective IO power
supply voltage. This allows external voltage sources to be connected to these IO terminals when the
respective IO power supplies are turned off. The MCU_I2C0_SCL, MCU_I2C0_SDA, I2C0_SCL, I2C0_SDA,
EXTINTn, VMON_1P8_MCU, VMON_1P8_SOC, VMON_3P3_MCU, VMON_3P3_SOC, VMON_VSYS, and
MCU_PORz are the only fail-safe IO terminals. All other IO terminals are not fail-safe and the voltage applied to
them should be limited to the value defined by the Steady State Max. Voltage at all IO pins parameter in Section
7.1.
T
overshoot
T
undershoot
T
period
Overshoot = 20% of nominal
IO supply voltage
Undershoot = 20% of nominal
IO supply voltage
A.
Tovershoot + Tundershoot < 20% of Tperiod
Figure 7-1. IO Transient Voltage Ranges
www.ti.com
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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