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AM6412...ALV 数据表(PDF) 23 Page - Texas Instruments

部件名 AM6412...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6412...ALV 数据表(HTML) 23 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
U19
GPMC0_AD5
PADCONFIG:
PADCONFIG20
0x000F4050
GPMC0_AD5
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX3_D1
1
I
0
UART3_RTSn
2
O
EHRPWM1_A
3
IO
0
TRC_DATA3
6
O
GPIO0_83
7
IO
pad
PRG0_PWM2_A1
9
IO
0
BOOTMODE05
Bootstrap
I
V20
GPMC0_AD6
PADCONFIG:
PADCONFIG21
0x000F4054
GPMC0_AD6
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX4_D0
1
I
0
UART4_RXD
2
I
1
EHRPWM1_B
3
IO
0
TRC_DATA4
6
O
GPIO0_21
7
IO
pad
PRG0_PWM2_B1
9
IO
1
BOOTMODE06
Bootstrap
I
V21
GPMC0_AD7
PADCONFIG:
PADCONFIG22
0x000F4058
GPMC0_AD7
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX4_D1
1
I
0
UART4_TXD
2
O
EHRPWM_TZn_IN1
3
I
0
EHRPWM8_A
4
IO
0
TRC_DATA5
6
O
GPIO0_22
7
IO
pad
PRG1_PWM2_A2
9
IO
0
BOOTMODE07
Bootstrap
I
V19
GPMC0_AD8
PADCONFIG:
PADCONFIG23
0x000F405C
GPMC0_AD8
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX0_CLK
1
I
0
UART2_CTSn
2
I
1
EHRPWM2_A
3
IO
0
TRC_DATA6
6
O
GPIO0_23
7
IO
pad
PRG0_PWM2_A2
9
IO
0
BOOTMODE08
Bootstrap
I
www.ti.com
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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