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H5AN4G4NAFR-RDC 数据表(PDF) 35 Page - Hynix Semiconductor

部件名 H5AN4G4NAFR-RDC
功能描述  4Gb DDR4 SDRAM Lead-Free&Halogen-Free (RoHS Compliant)
PDF  45 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

H5AN4G4NAFR-RDC 数据表(HTML) 35 Page - Hynix Semiconductor

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Rev. 1.3 / Mar.2016
34
NOTE :
1. This parameter is not subject to production test. It is verified by design and characterization. The package parasitic( L & C) are val-
idated using package only samples. The capacitance is measured with VDD, VDDQ, VSS, VSSQ shorted with all other signal pins
floating. The inductance is measured with VDD, VDDQ, VSS and VSSQ shorted and all other signal pins shorted at the die side(not
pin). Measurement procedure tbd
2. Package only impedance (Zpkg) is calculated based on the Lpkg and Cpkg total for a given pin where:
3. Package only delay(Tpkg) is calculated based on Lpkg and Cpkg total for a given pin where:
4. Z & Td IO applies to DQ, DM, TDQS_T and TDQS_C
5. This parameter applies to monolithic devices only; stacked/dual-die devices are not covered here
6. Absolute value of ZCK_t-ZCK_c for impedance(Z) or absolute value of TdCK_t-TdCK_c for delay(Td).
7. Absolute value of ZIO(DQS_t)-ZIO(DQS_c) for impedance(Z) or absolute value of TdIO(DQS_t)-TdIO(DQS_c) for delay(Td)
8. ZI & Td ADD CMD applies to A0-A13, ACT_n, BA0-BA1, BG0-BG1, RAS_n/A16, CAS_n/A15, WE_n/A14 and PAR.
9. ZI & Td CTRL applies to ODT, CS_n and CKE
10. This table applies to monolithic X4 and X8 devices.
11. Package implementations shall meet spec if the Zpkg and Pkg Delay fall within the ranges shown, and the maximum Lpkg and
Cpkg do not exceed the maximum values shown.
12. It is assumed that Lpkg can be approximated as Lpkg = Zo*Td.
13. It is assumed that Cpkg can be approximated as Cpkg = Td/Zo.
Zpkg(total per pin) =
Lpkg/Cpkg
Tdpkg(total per pin) =
Lpkg
Cpkg



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