数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

L99MOD50XP 数据表(PDF) 17 Page - STMicroelectronics

部件名 L99MOD50XP
功能描述  Multi-output driver for automotive applications
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L99MOD50XP 数据表(HTML) 17 Page - STMicroelectronics

Back Button L99MOD50XP Datasheet HTML 13Page - STMicroelectronics L99MOD50XP Datasheet HTML 14Page - STMicroelectronics L99MOD50XP Datasheet HTML 15Page - STMicroelectronics L99MOD50XP Datasheet HTML 16Page - STMicroelectronics L99MOD50XP Datasheet HTML 17Page - STMicroelectronics L99MOD50XP Datasheet HTML 18Page - STMicroelectronics L99MOD50XP Datasheet HTML 19Page - STMicroelectronics L99MOD50XP Datasheet HTML 20Page - STMicroelectronics L99MOD50XP Datasheet HTML 21Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 42 page
background image
DS12615 Rev 4
17/42
L99MOD50XP
Electrical specifications
41
15.5
RCLK in
CLK pull down resistor
VCC = 5 V
VCLK = 1.5 V
30
60
150
15.6
RDI in
DI pull down resistor
VCC = 5 V
VDI = 1.5 V
30
60
150
15.7
RPWM1 in PWM1 pull down resistor
VCC = 5 V
VPWM1= 1.5 V
30
60
150
15.8
Cin(1)
Input capacitance at input CSN,
CLK, DI and PWM1/2
0 V < VCC < 5.3 V10
pF
1. Value of input capacity is not measured in production test. Parameter guaranteed by design.
Table 14. Inputs: CSN, CLK, PWM1/2 and DI (continued)
Item
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
Table 15. SDI timing
Item
Symbol
Parameter(1)
Test condition
Min.
Typ.
Max.
Unit
16.1
tCLK
Clock period
VCC = 5 V
1000
ns
16.2
tCLKH
Clock high time
VCC = 5 V
115
ns
16.3
tCLKL
Clock low time
VCC = 5 V
115
ns
16.4
tset CSN
CSN setup time, CSN low
before rising edge of CLK
VCC = 5 V
400
ns
16.5
tset CLK
CLK setup time, CLK high
before rising edge of CSN
VCC = 5 V
400
ns
16.6
tset DI
DI setup time
VCC = 5 V
200
ns
16.7
thold DI
DI hold time
VCC = 5 V
200
ns
16.8
tr in
Rise time of input signal DI,
CLK, CSN
VCC = 5 V
100
ns
16.9
tf in
Fall time of input signal DI,
CLK, CSN
VCC = 5 V
100
ns
1. DI timing parameters tested in production by a passed / failed test:
Tj = -40°C / +25°C: SPI communication @ 2 MHz.
Tj = +125°C: SPI communication @ 1.25 MHz.
Table 16. DO
Item
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
17.1
VDOL
Output low level
IDO = -5 mA
0.2VCC
V
17.2
VDOH
Output high level
IDO = 5 mA
0.8 VCC
V
17.3
IDOLK
Tristate leakage current
VCSN = VCC,
0 V < VDO < VCC
-10
10
μA
17.4
CDO (1)
Tristate input
capacitance
VCSN = VCC,
0 V < VCC < 5.3 V
10
pF
1. Value of input capacity is not measured in production test. Parameter guaranteed by design.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com