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L99MOD50XP 数据表(PDF) 30 Page - STMicroelectronics |
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L99MOD50XP 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 42 page ![]() SPI - control and status registers L99MOD50XP 30/42 DS12615 Rev 4 5 SPI - control and status registers 5.1 Control register 0 5.2 Control register 1 Table 24. Control register 0 (read/write) Bit Name Comment 15 OUT1 – HS on/off If a bit is set the selected output driver is switched on. If the corresponding PWM enable bit is set the driver is only activated if PWM1 (PWM2) input signal is high. The outputs of OUT1-OUT6 are half bridges. If the bits of HS- and LS-driver of the same half bridge are set, the internal logic prevents that both drivers of this output stage can be switched on simultaneously in order to avoid a high internal current from Vs to GND. 14 OUT1 – LS on/off 13 OUT2 – HS on/off 12 OUT2 – LS on/off 11 OUT3 – HS on/off 10 OUT3 – LS on/off 9 OUT4 – HS on/off 8 OUT4 – LS on/off 7 OUT5 – HS on/off 6 OUT5 – LS on/off 5 OUT6 – HS on/off 4 OUT6 – LS on/off 30 Reserved (has to be set to '0') 20 10 0 Enable bit If enable bit is set the device will be switched in active mode. If enable bit is cleared, the device enters standby mode and all bits are cleared. Table 25. Control register 1 (read/write) Bit Name Comment 15 OUT7 – HS1 on/off OUT7/8 14 OUT7 – HS2 on/off HS1 HS2 Mode 1 1 Off 13 OUT8 – HS1 on/off 1 0 Low on-resistance 0 1 High on-resistance 12 OUT8 – HS2 on/off 0 0 Off |
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