L99MOD50XP datasheet(33/42 Pages) STMICROELECTRONICS

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DS12615 Rev 4

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L99MOD50XP

SPI - control and status registers

5.5

Status register 0

5.6

Status register 1

Table 28. Status register 0 (read)

Bit

Name

Comment

OUT1 – HS OC

In case of an over-current event the corresponding status bit is set and the output

driver is disabled. If the over-current Recovery Enable bit is set the output will be

automatically reactivated after a delay time resulting in a PWM modulated current with

a programmable duty cycle.

If the over-current recovery bit is not set, the micro controller has to clear the over-

current bit to reactivate the output driver.

OUT1 – LS OC

OUT2 – HS OC

OUT2 – LS OC

OUT3 – HS OC

OUT3 – LS OC

OUT4 – HS OC

OUT4 – LS OC

OUT5 – HS OC

OUT5 – LS OC

OUT6 – HS OC

OUT6 – LS OC

Reserved

Table 29. Status register 1 (read)

Bit

Name

Comment

OUT1 – HS UC

Maskable by the

configuration register

OUT1 – LS UC

OUT2 – HS UC

The open load detection monitors the load current in each activated output stage. If the

load current is below the under-current detection threshold for at least 1 ms (tdOL), the

corresponding under-current bit UC is set. Due to mechanical/electrical inertia of

typical loads a short activation of the outputs (e.g. 3ms) can be used to test the open

load status without changing the mechanical/electrical state of the loads.

OUT2 – LS UC

OUT3 – HS UC

OUT3 – LS UC

OUT4 – HS UC

OUT4 – LS UC

OUT5 – HS UC

OUT5 – LS UC

OUT6 – HS UC

OUT6 – LS UC

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