SM8521 datasheet(29/56 Pages) SHARP

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SM8521

- 29 -

P0 to P3 (PIO data register)

Bit 7

(x = 0, 1, 2, 3)

NOTE :

In case of reading P0-P3 register on condition that control

on condition that control register is output state, data of

P0C to P2C (PIO control register)

Bit 7

(x = 0, 1, 2)

Bits 7 to 6 :

Bits 5 to 4 :

Bits 3 to 2 :

Bits 1 to 0 :

I/O PORTS

The SM8521 supports four 8-bit I/O ports. Each

port can be selected one out of input, outpit, input

with built-in pull-up resistor and open-drain in each

2-bit.

Internal Bus

Input/output

pins

Data register

I/O control circuit

Control register

Fig. 12

PIO Block Diagram

PX7PX6PX5PX4PX3PX2PX1PX0

PXC7 PXC6 PXC5 PXC4 PXC3 PXC2 PXC1 PXC0

BIT

CONTENT

Input

Input (with pull-up resistor)

Output

Output (open-drain)

BIT

CONTENT

Input

Input (with pull-up resistor)

Output

Output (open-drain)

BIT

CONTENT

Input

Input (with pull-up resistor)

Output

Output (open-drain)

BIT

CONTENT

Input

Input (with pull-up resistor)

Output

Output (open-drain)

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SM8521 数据表(PDF) 29 Page - Sharp Corporation

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