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STA335BWSQS 数据表(PDF) 29 Page - STMicroelectronics

部件名 STA335BWSQS
功能描述  2.1-channel, high-efficiency digital audio system with QSound QHD®
PDF  70 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA335BWSQS 数据表(HTML) 29 Page - STMicroelectronics

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STA335BWSQS
Register description
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6.2.4
Delay serial clock enable
Table 19.
Supported serial audio input formats for LSB-first (SAIFB = 1)
BICKI
SAI [3:0]
SAIFB
Interface Format
32fs
1100
1
I2S 15-bit data
1110
1
Left/right-justified 16-bit data
48fs
0100
1
I2S 23-bit data
0100
1
I2S 20-bit data
1000
1
I2S 18-bit data
1100
1
LSB first I2S 16-bit data
0001
1
Left-justified 24-bit data
0101
1
Left-justified 20-bit data
1001
1
Left-justified 18-bit data
1101
1
Left-justified 16-bit data
0010
1
Right-justified 24-bit data
0110
1
Right-justified 20-bit data
1010
1
Right-justified 18-bit data
1110
1
Right-justified 16-bit data
64fs
0000
1
I2S 24-bit data
0100
1
I2S 20-bit data
1000
1
I2S 18-bit data
1100
1
LSB first I2S 16-bit data
0001
1
Left-justified 24-bit data
0101
1
Left-justified 20-bit data
1001
1
Left-justified 18-bit data
1101
1
Left-justified 16-bit data
0010
1
Right-justified 24-bit data
0110
1
Right-justified 20-bit data
1010
1
Right-justified 18-bit data
1110
1
Right-justified 16-bit data
Table 20.
DSCKE
Bit
RW
RST
Name
Description
5RW
0
DSCKE
0: No serial clock delay
1: Serial clock delay by 1 core clock cycle to tolerate
anomalies in some I2S master devices



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