RAMK060

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Vishay MCB

Revision: 03-May-2022

6

Document Number: 32579

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BISS-C INTERFACE (Optional)

Fig. 4 - Biss-C Chronogram

TABLE 4 - BISS-C CONNECTOR

PIN NO.

NAME

1VCC power supply

2CLK+

3CLK-

4

DATA+

5

DATA-

6

GND power supply

TABLE 5 - BISS-C PARAMETERS

PARAMETER

INFORMATION

Biss-C configuration

Point to point (multi-slave not supported)

CLK and data differential interface

RS422 according to the EIA-RS422

Output DATA

Left aligned

Clock frequency (tclk)

5 MHz maximum (3 MHz tested)

ACK

12 bits always equal to 0

Start

1 bit always equal to 1

CDS

1 bit always equal to 0

Data bit status

3

Data bits (angle value)

19 (see Table 6)

CRC

6 bits inverted, P(x) = X3 + X1 + 1, (0 x 43)

Time out (time between two requests)

20 μs minimum

TABLE 6 - BISS-C DATA BITS FORMAT

ANGLE VALUE BISS-C DATA BITS FORMAT

FRAME BITS (BISS-C CHRONOGRAM FIG. 4)

FUNCTION

Bit 0

Status bit A1

Bit 1

Status bit A2

Bit 2

Status bit A3

Bit 3

Data MSB

Bit 21

Data LSB

Bit 22

Always = 0

Bit 23

CRC MSB

Bit 28

CRC LSB

A3

LSB

CRC

LSB

CRC

MSB

tclk

Biss-C

ACK

Start

CDS

Time out

MA+

SLO+

MA-

A1

0

A2

12

MSB

321

22

23

24

28

SLO-

t = 20 µs