RAMK060

www.vishay.com

Vishay MCB

Revision: 03-May-2022

9

Document Number: 32579

For technical questions, contact: mcbprecisionpot@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

MULTI-TURNS BISS-C OUTPUT FORMAT

Fig. 7 - Biss-C Multi-Turns Chronogram

Note

• Bit 38 always = 0

MULTI-TURNS SPI OUTPUT FORMAT

Fig. 8 - SPI Multi-Turns Chronogram

Note

• Bit 38 always = 0

OPTIONAL BATTERY BACKUP CONNECTOR

• Header on the PCB: Hirose SMD 7 106 (666-1001-0-21)

• Crimp socket: Hirose DF58-2S-1.2C (Hirose number 666-1006-0 00)

• Crimp contact: Hirose DF58-2830SCF (Hirose number 666-1011-0 00)

TABLE 11 - BISS-C MULTI-TURN DATA BITS FORMAT

BISS-C DATA BITS FORMAT

DATA BIT

MSB

LSB

DATA BITS LENGTH

INFORMATION

Status bits

Frame bit 0

Frame bit 2

3 bits

See section “Self-Monitoring”

Multi-turns counter

Frame bit 3

Frame bit 18

16 bits

See Fig. 7

Angle value

Frame bit 19

Frame bit 37

19 bits

See Table 6

CRC

Frame bit 39

Frame bit 44

6 bits

TABLE 12 - SPI MULTI-TURN DATA BITS FORMAT

SPI DATA BITS FORMAT

DATA BIT

MSB

LSB

DATA BITS LENGTH

INFORMATION

Status bits

Frame bit 0

Frame bit 2

3 bits

See section “Self-Monitoring”

Multi-turns counter

Frame bit 3

Frame bit 18

16 bits

See Fig. 8

Angle value

Frame bit 19

Frame bit 37

19 bits

See Table 9

Parity

Frame bit 39

-

1 bit

A1

A2

A3

MSB

LSB

CRC

MSB

Biss-C

ACK

Start CDS

CRC

LSB

Time out

MA+

SLO+

MA-

0

1

2

3

38

39

44

SLO-

19

18

LSB MSB

tclk

t = 20 μs

A1

A2

A3

MSB

LSB

MSB

LSB

P

A1

A2

A3

MSB

SPI Slave Mode

Bit 0

Bit 1

Bit 2

Bit 3

Bit 18

Bit 19

Bit 38

Bit 39

t

s = 1 μs

t

p = 6 μs

t

clk