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FT801 Embedded Video Engine Datasheet

Version 1.3

Document Reference No.: BRT_000001

Clearance No.: BRT#003

4.7.2 Extended mode

Setting REG_CTOUCH_EXTENDED to 1b’0 enables extended mode. In extended mode a new set of

readout registers are available, allowing gesture and up to five touches to be read. There are two classes

of registers: control registers and status registers. Control registers are written by MCU. Status registers

can be read out by MCU and the FT801’s hardware tag system.

The five touch coordinates are packed in REG_CTOUCH_TOUCH0_XY, REG_CTOUCH_TOUCH1_XY,

REG_CTOUCH_TOUCH2_XY, REG_CTOUCH_TOUCH3_XY, REG_CTOUCH4_X and REG_CTOUCH4_Y.

Coordinates stored in these registers are signed 16-bit values, so have range -32768 to 32767. The no-

touch condition is indicated by x=y= -32768. These coordinates are already transformed into screen

coordinates

based

on

the

raw

data

read

from

CTPM,

using

the

matrix

in

registers

REG_CTOUCH_TRANSFORM_A-F. To obtain raw (x, y) coordinates read from CTPM, the user sets the

REG_CTOUCH_TRANSFORM_A-F registers to the identity matrix.

The FT801 tag mechanism is implemented by hardware, and can only query a single (x, y) location.

REG_TOUCH_TAG always reports the first touch, that is, the (x, y) from REG_CTOUCH_TOUCH0_XY.

4.8

Power Management

4.8.1 Power supply

The FT801 may be operated with a single supply of 3.3V apply to VCC and VCCIO pins. For operation with

host MPU/MCU at lower supply, connect the VCCIO to MPU power to match the interface power.

Symbol

Typical

Description

VCCIO

1.8V, or 2.5V, or

3.3V

Supply for Host interface digital I/O pad only, LCD RGB interface supply

from VCC.

VCC

3.3V

Supply for chip

Table 4-15 Power supply

4.8.2 Internal Regulator and POR

The 1.2V internal regulator provides power to the core circuit. The regulator is disabled when device is in

POWERDOWN state. Power down is activated either by the SCU command write or by holding down the

PD_N pin for at least 5mS to allow the 1.2V decoupling capacitor to discharge fully. The regulator is

enabled only by releasing the PD_N pin. A 47kΩ resistor is recommended to pull the PD_N pin up to

VCCIO, together with a 100nF capacitor to ground in order to delay the 1.2V regulator powering up after

the VCC and VCCIO are stable.

The 1.2V internal regulator requires a compensation capacitor to be stable. A typical design puts a 4.7uF

capacitor with ESR >0.5Ω is required between VCC1V2 to GND pins. Do not connect any load to this pin.

The 1.2V regulator will generate Power-On-Reset (POR) pulse when the output voltage rises above the

POR threshold. The POR will reset all the core digital circuits.

It is possible to use PD_N pin as an asynchronous hardware reset input. Drive PD_N low for at least 5ms

and then drive it high will reset the FT801 chip.